Hi, I hope this goes to the right place since I just joined the mailing list and don't have the original email.

@ Mark Butler: I have had success with the RTC, after a lot of poking an prodding.
Here's my working code, avoiding all the current helper functions so I could get it straight in my head:

    u32 reg32;
   
    /* Enable power and backup interface clocks. */
    RCC_APB1ENR |= (PWREN | BKPEN);
   
    /* Enable access to the backup registers and the RTC. */
    /* PWR definitions implemented, enough to use. */
    PWR_CR |= PWR_CR_DBP;
   
    /* Simulate a power off situation */
    RCC_BDCR |= BDRST;
    RCC_BDCR &= ~BDRST;
   
    /* Turn the LSE on */
    RCC_BDCR |= LSEON;
   
    /* Wait while it stabilises */
    while((reg32 = (RCC_BDCR & LSERDY)) == 0);
   
    /* Choose LSE as the RTC clock source */
    RCC_BDCR |= (1<<8);
   
    /* Enable the RTC */
    RCC_BDCR |= RTCEN;

    /* Wait for the RSF bit in RTC_CRL to be set by hardware */
    RTC_CRL &= ~RTC_CRL_RSF;
    while ((reg32 = (RTC_CRL & RTC_CRL_RSF)) == 0);
   
    /*     Wait for the last write operation to finish
        (shouldn't have to wait but it prevents any stupidity
        on my part when I set the prescaler later) */
    while ((reg32 = (RTC_CRL & RTC_CRL_RTOFF)) == 0);

Over the next couple of days I'll flesh out the RTC library a bit more.

Cheers,

Jim