--- a/fpga/examples/pong/pong.vhd
+++ b/fpga/examples/pong/pong.vhd
@@ -7,7 +7,7 @@
     port (
     clk : in std_logic;
 
---    btn : in  std_logic_vector(3 downto 0);
+    btn : in  std_logic_vector(3 downto 0);
     Led : out std_logic_vector(7 downto 0);
 --    usb : in std_logic;
 --    sw : in std_logic_vector(7 downto 0);
@@ -35,7 +35,7 @@
       palet_height : positive := 20      
       );
     port (
-      update : in std_logic;
+--      update : in std_logic;
       x_pixel : in  integer range 0 to 639;
       y_pixel : in  integer range 0 to 479;
       ball_x : in integer range 0 to size_x - 1;
@@ -87,20 +87,21 @@
     generic (
       size_x : positive := 400;
       size_y : positive := 400;
+      palet_width : positive := 5;
       palet_height : positive := 20);
     port (
     clk : in std_logic;
-    scan_code : in std_logic_vector ( 7 downto 0 );
-    up_key : in std_logic;
-    extended_key : in std_logic;
-    key_int : in std_logic;
+    key_up_l : in std_logic;
+    key_down_l : in std_logic;
+    key_up_r : in std_logic;
+    key_down_r : in std_logic;
     ball_x : out integer range 0 to size_x - 1;
     ball_y : out integer range 0 to size_y - 1;
     palet_l : out integer range 0 to size_y - 1;
     palet_r : out integer range 0 to size_y - 1;
     score_l : out integer range 0 to 255;
-    score_r : out integer range 0 to 255;
-    keys : out std_logic_vector ( 3 downto 0 )
+    score_r : out integer range 0 to 255
+--    keys : out std_logic_vector ( 3 downto 0 )
     );
   end component;
 
@@ -125,6 +126,11 @@
   signal key_extended : std_logic;
   signal key_int : std_logic;
 
+  signal key_up_l : std_logic;
+  signal key_down_l : std_logic;
+  signal key_up_r : std_logic;
+  signal key_down_r : std_logic;
+  
   signal slow_clk : std_logic;
   signal value_7seg : std_logic_vector ( 15 downto 0 );
   signal point_7seg : std_logic_vector ( 3 downto 0 );
@@ -138,13 +144,23 @@
   
   signal score_l : integer range 0 to 255 := 0;
   signal score_r : integer range 0 to 255 := 0;
+  signal score_l_vector : std_logic_vector ( 7 downto 0 );
+  signal score_r_vector : std_logic_vector ( 7 downto 0 );
+  
 begin
 
   vsync <= internal_vsync;
-  vga_out <= vga_color;
-
-  value_7seg <= (conv_std_logic_vector(score_l,8)) & (conv_std_logic_vector(score_r,8));
-
+  vga_out <= vga_color when active_output = '1' else "00000000";
+
+  score_l_vector <= (conv_std_logic_vector(score_l,8));
+  score_r_vector <= (conv_std_logic_vector(score_r,8));
+  value_7seg <=   (score_l_vector(3 downto 0)) & (score_l_vector(7 downto 4))
+                & (score_r_vector(3 downto 0)) & (score_r_vector(7 downto 4));
+  key_up_l <= btn(0);
+  key_down_l <= btn(1);
+  key_up_r <= btn(2);
+  key_down_r <= btn(3);
+  
   draw_1 : draw
     generic map
     (
@@ -154,7 +170,7 @@
       palet_height
       )
     port map
-    ( internal_vsync,
+    ( -- internal_vsync,
       vga_x,
       vga_y,
       ball_x,
@@ -168,23 +184,24 @@
     generic map (
       size_x,
       size_y,
+      palet_width,
       palet_height)
     port map (
     clk,
-    scan_code,
-    key_up,
-    key_extended,
-    key_int,
+    key_up_l,
+    key_down_l,
+    key_up_r,
+    key_down_r,
     ball_x,
     ball_y,
     palet_l,
     palet_r,
     score_l,
-    score_r,
-    led ( 3 downto 0 )
+    score_r
+--    led ( 3 downto 0 )
     );
 
-  led ( 7 downto 4 ) <= "0000";
+  led ( 7 downto 0 ) <= "00000000";
 
   vga_1 : vga port map
     ( clk,