[Kernelloader-cvs] linux/simple-toolchain gcc-cvs-20131204-mips-ps2.patch, NONE, 1.1 build.sh, 1.26
Run Linux on the Playstation 2
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From: Mega M. <kl...@us...> - 2013-01-05 00:39:39
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Update of /cvsroot/kernelloader/linux/simple-toolchain In directory sfp-cvs-1.v30.ch3.sourceforge.com:/tmp/cvs-serv22515/simple-toolchain Modified Files: build.sh Added Files: gcc-cvs-20131204-mips-ps2.patch Log Message: Update toolchain. Index: build.sh =================================================================== RCS file: /cvsroot/kernelloader/linux/simple-toolchain/build.sh,v retrieving revision 1.26 retrieving revision 1.27 diff -C2 -d -r1.26 -r1.27 *** build.sh 1 Jan 2013 22:51:26 -0000 1.26 --- build.sh 5 Jan 2013 00:39:04 -0000 1.27 *************** *** 12,20 **** NUM_CPUS=`grep /proc/cpuinfo -e "processor" | wc -l` PS2PATCH=y - PS2SOFTFLOAT=n BUILD_BINUTILS=y BUILD_GCC=y BUILD_GDB=y ! BINUTILS_VERSION="cvs-20121124" SYSTEMTYPE=linux BUILDTYPE=gnu --- 12,21 ---- NUM_CPUS=`grep /proc/cpuinfo -e "processor" | wc -l` PS2PATCH=y BUILD_BINUTILS=y BUILD_GCC=y BUILD_GDB=y ! BINUTILS_VERSION="cvs-20130104" ! #GCC_VERSION="cvs-20131204" ! GCC_VERSION="4.3.4" SYSTEMTYPE=linux BUILDTYPE=gnu *************** *** 33,37 **** echo "--prefix= Set install path for toolchain." echo "--gdb-only Only build gdb." - echo "--soft-float Set compiler default to soft float." echo "--toolchain= Set toolchain (mipsel, mips64el, mipsr5900el or mips64r5900el)." echo "--no-binutils Don't build binutils." --- 34,37 ---- *************** *** 41,44 **** --- 41,45 ---- echo "--disable-werror Don't treat warnings as errors (binutils)." echo "--binutils-version= Version of binutils (default ${BINUTILS_VERSION})." + echo "--gcc-version= Version of binutils (default ${GCC_VERSION})." } *************** *** 75,81 **** BUILD_GDB=n ;; - --soft-float) - PS2SOFTFLOAT=y - ;; --toolchain=*) TOOLCHAIN="$param" --- 76,79 ---- *************** *** 93,96 **** --- 91,97 ---- BINUTILS_VERSION="$param" ;; + --gcc-version=) + GCC_VERSION="$param" + ;; *) echo "Error: unknown parameter $arg" *************** *** 171,176 **** cd "binutils-$BINUTILS_VERSION$BUILDSUFFIX" || exit -1 if [ "$PS2PATCH" = "y" ]; then ! patch -p1 <"$WORKDIR/binutils-$BINUTILS_VERSION-mipsel-ps2.patch" || exit -1 ! patch -p1 <"$WORKDIR/binutils-$BINUTILS_VERSION-mipsel-ps2-tests.patch" || exit -1 fi mkdir build || exit -1 --- 172,181 ---- cd "binutils-$BINUTILS_VERSION$BUILDSUFFIX" || exit -1 if [ "$PS2PATCH" = "y" ]; then ! if [ -e "$WORKDIR/binutils-$BINUTILS_VERSION-mipsel-ps2.patch" ]; then ! patch -p1 <"$WORKDIR/binutils-$BINUTILS_VERSION-mipsel-ps2.patch" || exit -1 ! fi ! if [ -e "$WORKDIR/binutils-$BINUTILS_VERSION-mipsel-ps2-tests.patch" ]; then ! patch -p1 <"$WORKDIR/binutils-$BINUTILS_VERSION-mipsel-ps2-tests.patch" || exit -1 ! fi fi mkdir build || exit -1 *************** *** 184,200 **** if [ "$BUILD_GCC" = "y" ]; then cd "$BUILDDIR" || exit -1 ! rm -rf "gcc-4.3.4" || exit -1 ! rm -rf "gcc-4.3.4$BUILDSUFFIX" || exit -1 ! tar -xzf "$SRCPATH/gcc-4.3_4.3.4.orig.tar.gz" || exit -1 ! tar --lzma -xf gcc-4.3-4.3.4.orig/gcc-4.3.4.tar.lzma || exit -1 ! rm -r gcc-4.3-4.3.4.orig || exit -1 ! mv gcc-4.3.4 "gcc-4.3.4$BUILDSUFFIX" || exit -1 ! cd "gcc-4.3.4$BUILDSUFFIX" || exit -1 if [ "$PS2PATCH" = "y" ]; then # R5900 patch: ! patch -p1 <"$PATCHDIR/gcc-4.3.4-mips-ps2.patch" || exit -1 ! if [ "$PS2SOFTFLOAT" = "y" ]; then ! patch -p1 <"$PATCHDIR/gcc-4.3.4-mips-ps2-soft-float.patch" || exit -1 ! fi fi if [ "$SYSTEMTYPE" = "linux" ]; then --- 189,207 ---- if [ "$BUILD_GCC" = "y" ]; then cd "$BUILDDIR" || exit -1 ! rm -rf "gcc-${GCC_VERSION}" || exit -1 ! rm -rf "gcc-${GCC_VERSION}$BUILDSUFFIX" || exit -1 ! if [ "$GCC_VERSION" = "4.3.4" ]; then ! tar -xzf "$SRCPATH/gcc-4.3_4.3.4.orig.tar.gz" || exit -1 ! tar --lzma -xf gcc-4.3-4.3.4.orig/gcc-4.3.4.tar.lzma || exit -1 ! rm -r gcc-4.3-4.3.4.orig || exit -1 ! mv gcc-4.3.4 "gcc-4.3.4$BUILDSUFFIX" || exit -1 ! else ! tar -xjf "$SRCPATH2/gcc-$GCC_VERSION.tar.bz2" || exit -1 ! mv "gcc-$GCC_VERSION" "gcc-${GCC_VERSION}$BUILDSUFFIX" || exit -1 ! fi ! cd "gcc-${GCC_VERSION}$BUILDSUFFIX" || exit -1 if [ "$PS2PATCH" = "y" ]; then # R5900 patch: ! patch -p1 <"$PATCHDIR/gcc-${GCC_VERSION}-mips-ps2.patch" || exit -1 fi if [ "$SYSTEMTYPE" = "linux" ]; then *************** *** 202,206 **** mkdir build01 || exit -1 cd build01 || exit -1 ! ../configure --program-prefix="$PROGRAMPREFIX" --target=$TOOLCHAIN-$SYSTEMTYPE-$BUILDTYPE --enable-languages=c --prefix="$PREFIX" --includedir="$INSTALLPATH/include" --disable-nls --disable-shared --disable-libssp --disable-libmudflap --disable-threads --disable-libgomp --disable-libquadmath --disable-target-libiberty --disable-target-zlib --without-ppl --without-cloog --with-headers=no $additional_params || exit -1 make -j $NUM_CPUS || exit -1 $SUDO make install || exit -1 --- 209,213 ---- mkdir build01 || exit -1 cd build01 || exit -1 ! ../configure --program-prefix="$PROGRAMPREFIX" --target=$TOOLCHAIN-$SYSTEMTYPE-$BUILDTYPE --enable-languages=c --prefix="$PREFIX" --includedir="$INSTALLPATH/include" --disable-nls --disable-shared --disable-libssp --disable-libmudflap --disable-threads --disable-libgomp --disable-libquadmath --disable-target-libiberty --disable-target-zlib --without-ppl --without-cloog --with-headers=no --disable-libada $additional_params || exit -1 make -j $NUM_CPUS || exit -1 $SUDO make install || exit -1 *************** *** 217,224 **** # Stage 2 Build ! cd "$BUILDDIR/gcc-4.3.4$BUILDSUFFIX" || exit -1 mkdir build02 || exit -1 cd build02 || exit -1 ! ../configure --program-prefix="$PROGRAMPREFIX" --target=$TOOLCHAIN-$SYSTEMTYPE-$BUILDTYPE --enable-languages=c --prefix="$PREFIX" --includedir="$INSTALLPATH/include" $additional_params || exit -1 make -j $NUM_CPUS || exit -1 $SUDO make install || exit -1 --- 224,231 ---- # Stage 2 Build ! cd "$BUILDDIR/gcc-${GCC_VERSION}$BUILDSUFFIX" || exit -1 mkdir build02 || exit -1 cd build02 || exit -1 ! ../configure --program-prefix="$PROGRAMPREFIX" --target=$TOOLCHAIN-$SYSTEMTYPE-$BUILDTYPE --enable-languages=c --prefix="$PREFIX" --includedir="$INSTALLPATH/include" --disable-libada $additional_params || exit -1 make -j $NUM_CPUS || exit -1 $SUDO make install || exit -1 --- NEW FILE: gcc-cvs-20131204-mips-ps2.patch --- diff -Nurp gcc-cvs-20131204/config.sub gcc-cvs-20131204-ps2/config.sub --- gcc-cvs-20131204/config.sub 2005-07-14 03:08:13.000000000 +0200 +++ gcc-cvs-20131204-ps2/config.sub 2013-01-04 23:37:09.757181455 +0100 @@ -249,6 +249,8 @@ case $basic_machine in | mips64vr4300 | mips64vr4300el \ | mips64vr5000 | mips64vr5000el \ | mips64vr5900 | mips64vr5900el \ + | mips64r5900 | mips64r5900el \ + | mipsr5900 | mipsr5900el \ | mipsisa32 | mipsisa32el \ | mipsisa32r2 | mipsisa32r2el \ | mipsisa64 | mipsisa64el \ @@ -328,6 +330,8 @@ case $basic_machine in | mips64vr4300-* | mips64vr4300el-* \ | mips64vr5000-* | mips64vr5000el-* \ | mips64vr5900-* | mips64vr5900el-* \ + | mips64r5900-* | mips64r5900el-* \ + | mipsr5900-* | mipsr5900el-* \ | mipsisa32-* | mipsisa32el-* \ | mipsisa32r2-* | mipsisa32r2el-* \ | mipsisa64-* | mipsisa64el-* \ diff -Nurp gcc-cvs-20131204/gcc/config/mips/linuxn32.h gcc-cvs-20131204-ps2/gcc/config/mips/linuxn32.h --- gcc-cvs-20131204/gcc/config/mips/linuxn32.h 1970-01-01 01:00:00.000000000 +0100 +++ gcc-cvs-20131204-ps2/gcc/config/mips/linuxn32.h 2013-01-05 00:41:24.661049322 +0100 @@ -0,0 +1,68 @@ +/* Definitions for MIPS running Linux-based GNU systems with ELF format + using n32 abi. + Copyright 2013 Free Software Foundation, Inc. + +This file is part of GCC. + +GCC is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2, or (at your option) +any later version. + +GCC is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with GCC; see the file COPYING. If not, write to +the Free Software Foundation, 51 Franklin Street, Fifth Floor, +Boston, MA 02110-1301, USA. */ + +/* Force the default endianness and ABI flags onto the command line + in order to make the other specs easier to write. */ +#define DRIVER_SELF_SPECS \ +"%{!EB:%{!EL:%(endian_spec)}}", \ +"%{!mabi=*: -mabi=n32}" + +#undef SUBTARGET_ASM_SPEC +#define SUBTARGET_ASM_SPEC "\ +%{!fno-PIC:%{!fno-pic:-KPIC}} \ +%{fno-PIC:-non_shared} %{fno-pic:-non_shared}" + +#undef LIB_SPEC +#define LIB_SPEC "\ +%{shared: -lc} \ +%{!shared: %{pthread:-lpthread} \ + %{profile:-lc_p} %{!profile: -lc}}" + +#undef LINK_SPEC +#define LINK_SPEC "\ +%{G*} %{EB} %{EL} %{mips1} %{mips2} %{mips3} %{mips4} \ +%{bestGnum} %{shared} %{non_shared} \ +%{call_shared} %{no_archive} %{exact_version} \ + %(endian_spec) \ + %{!shared: \ + %{!ibcs: \ + %{!static: \ + %{rdynamic:-export-dynamic} \ + %{!dynamic-linker: \ + %{mabi=n32: -dynamic-linker /lib32/ld.so.1} \ + %{mabi=32: -dynamic-linker /lib/ld.so.1}}} \ + %{static:-static}}} \ +%{mabi=n32:-melf32%{EB:b}%{EL:l}tsmipn32} \ +%{mabi=32:-melf32%{EB:b}%{EL:l}tsmip}" + +#undef LOCAL_LABEL_PREFIX +#define LOCAL_LABEL_PREFIX (TARGET_OLDABI ? "$" : ".") + +/* The size in bytes of a DWARF field indicating an offset or length + relative to a debug info section, specified to be 4 bytes in the DWARF-2 + specification. The SGI/MIPS ABI defines it to be the same as PTR_SIZE. */ +#define DWARF_OFFSET_SIZE PTR_SIZE + +/* GNU/Linux doesn't use the same floating-point format that IRIX uses + for long double. There's no need to override this here, since + ieee_quad_format is the default, but let's put this here to make + sure nobody thinks we just forgot to set it to something else. */ +#define MIPS_TFMODE_FORMAT mips_quad_format diff -Nurp gcc-cvs-20131204/gcc/config/mips/mips.c gcc-cvs-20131204-ps2/gcc/config/mips/mips.c --- gcc-cvs-20131204/gcc/config/mips/mips.c 2005-08-26 15:15:14.000000000 +0200 +++ gcc-cvs-20131204-ps2/gcc/config/mips/mips.c 2013-01-05 00:08:45.761116400 +0100 @@ -733,6 +733,7 @@ const struct mips_cpu_info mips_cpu_info { "r4600", PROCESSOR_R4600, 3 }, { "orion", PROCESSOR_R4600, 3 }, /* = r4600 */ { "r4650", PROCESSOR_R4650, 3 }, + { "r5900", PROCESSOR_R5900, 3 }, /* MIPS IV */ { "r8000", PROCESSOR_R8000, 4 }, @@ -943,6 +944,19 @@ static struct mips_rtx_cost_data const m { /* R4650 */ DEFAULT_COSTS }, + { /* R5900 */ + COSTS_N_INSNS (4), /* fp_add */ + COSTS_N_INSNS (4), /* fp_mult_sf */ + COSTS_N_INSNS (256), /* fp_mult_df (soft-float) */ + COSTS_N_INSNS (8), /* fp_div_sf */ + COSTS_N_INSNS (256), /* fp_div_df (soft-float) */ + COSTS_N_INSNS (4), /* int_mult_si */ + COSTS_N_INSNS (256), /* int_mult_di (soft-float) */ + COSTS_N_INSNS (37), /* int_div_si */ + COSTS_N_INSNS (256), /* int_div_di (soft-float) */ + 1, /* branch_cost */ + 4 /* memory_latency */ + }, { /* R5000 */ COSTS_N_INSNS (6), /* fp_add */ COSTS_N_INSNS (4), /* fp_mult_sf */ @@ -2707,7 +2721,7 @@ mips_split_64bit_move_p (rtx dest, rtx s /* Check for floating-point loads and stores. They can be done using ldc1 and sdc1 on MIPS II and above. */ - if (mips_isa > 1) + if ((mips_isa > 1) && !TARGET_MIPS5900) { if (FP_REG_RTX_P (dest) && MEM_P (src)) return false; @@ -8880,6 +8894,11 @@ mips_avoid_hazards (void) if (TARGET_FIX_VR4130 && !ISA_HAS_MACCHI) cfun->machine->all_noreorder_p = false; + /* Code compiled for R5900 can't be all noreorder, because + we rely on the assembler to work around some errata. */ + if (TARGET_MIPS5900) + cfun->machine->all_noreorder_p = false; + last_insn = 0; hilo_delay = 2; delayed_reg = 0; @@ -9869,6 +9888,7 @@ mips_issue_rate (void) case PROCESSOR_R4130: case PROCESSOR_R5400: case PROCESSOR_R5500: + case PROCESSOR_R5900: case PROCESSOR_R7000: case PROCESSOR_R9000: return 2; diff -Nurp gcc-cvs-20131204/gcc/config/mips/mips.h gcc-cvs-20131204-ps2/gcc/config/mips/mips.h --- gcc-cvs-20131204/gcc/config/mips/mips.h 2005-08-06 15:26:12.000000000 +0200 +++ gcc-cvs-20131204-ps2/gcc/config/mips/mips.h 2013-01-05 00:44:01.709043810 +0100 @@ -54,6 +54,7 @@ enum processor_type { PROCESSOR_R5000, PROCESSOR_R5400, PROCESSOR_R5500, + PROCESSOR_R5900, PROCESSOR_R7000, PROCESSOR_R8000, PROCESSOR_R9000, @@ -190,6 +191,7 @@ extern const struct mips_rtx_cost_data * #define TARGET_MIPS4130 (mips_arch == PROCESSOR_R4130) #define TARGET_MIPS5400 (mips_arch == PROCESSOR_R5400) #define TARGET_MIPS5500 (mips_arch == PROCESSOR_R5500) +#define TARGET_MIPS5900 (mips_arch == PROCESSOR_R5900) #define TARGET_MIPS7000 (mips_arch == PROCESSOR_R7000) #define TARGET_MIPS9000 (mips_arch == PROCESSOR_R9000) #define TARGET_SB1 (mips_arch == PROCESSOR_SB1) @@ -204,6 +206,7 @@ extern const struct mips_rtx_cost_data * #define TUNE_MIPS5000 (mips_tune == PROCESSOR_R5000) #define TUNE_MIPS5400 (mips_tune == PROCESSOR_R5400) #define TUNE_MIPS5500 (mips_tune == PROCESSOR_R5500) +#define TUNE_MIPS5900 (mips_tune == PROCESSOR_R5900) #define TUNE_MIPS6000 (mips_tune == PROCESSOR_R6000) #define TUNE_MIPS7000 (mips_tune == PROCESSOR_R7000) #define TUNE_MIPS9000 (mips_tune == PROCESSOR_R9000) @@ -574,7 +577,7 @@ extern const struct mips_rtx_cost_data * #define ISA_HAS_CONDMOVE ((ISA_MIPS4 \ || ISA_MIPS32 \ || ISA_MIPS32R2 \ - || ISA_MIPS64) \ + || ISA_MIPS64) \ && !TARGET_MIPS5500 \ && !TARGET_MIPS16) @@ -600,6 +603,7 @@ extern const struct mips_rtx_cost_data * #define ISA_HAS_MADD_MSUB ((ISA_MIPS32 \ || ISA_MIPS32R2 \ || ISA_MIPS64 \ + || TARGET_MIPS5900 \ ) && !TARGET_MIPS16) /* ISA has floating-point nmadd and nmsub instructions. */ @@ -673,7 +677,8 @@ extern const struct mips_rtx_cost_data * #define ISA_HAS_PREFETCH ((ISA_MIPS4 \ || ISA_MIPS32 \ || ISA_MIPS32R2 \ - || ISA_MIPS64) \ + || ISA_MIPS64 \ + || TARGET_MIPS5900) \ && !TARGET_MIPS16) /* ISA has data indexed prefetch instructions. This controls use of @@ -704,13 +709,16 @@ extern const struct mips_rtx_cost_data * and "addiu $4,$4,1". */ #define ISA_HAS_LOAD_DELAY (mips_isa == 1 \ && !TARGET_MIPS3900 \ - && !TARGET_MIPS16) + && !TARGET_MIPS16 \ + && !TARGET_MIPS5900) /* Likewise mtc1 and mfc1. */ -#define ISA_HAS_XFER_DELAY (mips_isa <= 3) +#define ISA_HAS_XFER_DELAY (mips_isa <= 3 \ + && !TARGET_MIPS5900) /* Likewise floating-point comparisons. */ -#define ISA_HAS_FCMP_DELAY (mips_isa <= 3) +#define ISA_HAS_FCMP_DELAY (mips_isa <= 3 \ + && !TARGET_MIPS5900) /* True if mflo and mfhi can be immediately followed by instructions which write to the HI and LO registers. @@ -727,7 +735,8 @@ extern const struct mips_rtx_cost_data * #define ISA_HAS_HILO_INTERLOCKS (ISA_MIPS32 \ || ISA_MIPS32R2 \ || ISA_MIPS64 \ - || TARGET_MIPS5500) + || TARGET_MIPS5500 \ + || TARGET_MIPS5900) /* Add -G xx support. */ diff -Nurp gcc-cvs-20131204/gcc/config/mips/mips.md gcc-cvs-20131204-ps2/gcc/config/mips/mips.md --- gcc-cvs-20131204/gcc/config/mips/mips.md 2005-07-29 19:25:25.000000000 +0200 +++ gcc-cvs-20131204-ps2/gcc/config/mips/mips.md 2013-01-05 00:12:06.917109585 +0100 @@ -1085,7 +1085,7 @@ (mult:GPR (match_operand:GPR 1 "register_operand" "d") (match_operand:GPR 2 "register_operand" "d"))) (clobber (match_scratch:GPR 3 "=h"))] - "!TARGET_FIX_R4000" + "(!TARGET_MIPS5900 || <MODE>mode == SImode) && !TARGET_FIX_R4000" "<d>mult\t%1,%2" [(set_attr "type" "imul") (set_attr "mode" "<MODE>")]) @@ -1096,7 +1096,7 @@ (match_operand:GPR 2 "register_operand" "d"))) (clobber (match_scratch:GPR 3 "=h")) (clobber (match_scratch:GPR 4 "=l"))] - "TARGET_FIX_R4000" + "(!TARGET_MIPS5900 || <MODE>mode == SImode) && TARGET_FIX_R4000" "<d>mult\t%1,%2\;mflo\t%0" [(set_attr "type" "imul") (set_attr "mode" "<MODE>") @@ -1692,7 +1692,7 @@ (any_extend:TI (match_operand:DI 2 "register_operand" "d"))) (const_int 64)))) (clobber (match_scratch:DI 3 "=l"))] - "TARGET_64BIT && !TARGET_FIX_R4000 + "!TARGET_MIPS5900 && TARGET_64BIT && !TARGET_FIX_R4000 && !(<CODE> == ZERO_EXTEND && TARGET_FIX_VR4120)" "dmult<u>\t%1,%2" [(set_attr "type" "imul") @@ -1739,7 +1739,7 @@ (plus:ANYF (mult:ANYF (match_operand:ANYF 1 "register_operand" "f") (match_operand:ANYF 2 "register_operand" "f")) (match_operand:ANYF 3 "register_operand" "f")))] - "ISA_HAS_FP4 && TARGET_FUSED_MADD" + "((TARGET_MIPS5900 && <UNITMODE>mode == SFmode) || ISA_HAS_FP4) && TARGET_FUSED_MADD" "madd.<fmt>\t%0,%3,%1,%2" [(set_attr "type" "fmadd") (set_attr "mode" "<UNITMODE>")]) @@ -1749,7 +1749,7 @@ (minus:ANYF (mult:ANYF (match_operand:ANYF 1 "register_operand" "f") (match_operand:ANYF 2 "register_operand" "f")) (match_operand:ANYF 3 "register_operand" "f")))] - "ISA_HAS_FP4 && TARGET_FUSED_MADD" + "((TARGET_MIPS5900 && <UNITMODE>mode == SFmode) || ISA_HAS_FP4) && TARGET_FUSED_MADD" "msub.<fmt>\t%0,%3,%1,%2" [(set_attr "type" "fmadd") (set_attr "mode" "<UNITMODE>")]) @@ -1878,7 +1878,7 @@ (set (match_operand:GPR 3 "register_operand" "=h") (mod:GPR (match_dup 1) (match_dup 2)))] - "!TARGET_FIX_VR4120" + "(!TARGET_MIPS5900 || <MODE>mode == SImode) && !TARGET_FIX_VR4120" { return mips_output_division ("<d>div\t$0,%1,%2", operands); } [(set_attr "type" "idiv") (set_attr "mode" "<MODE>")]) @@ -1890,7 +1890,7 @@ (set (match_operand:GPR 3 "register_operand" "=h") (umod:GPR (match_dup 1) (match_dup 2)))] - "" + "!TARGET_MIPS5900 || <MODE>mode == SImode" { return mips_output_division ("<d>divu\t$0,%1,%2", operands); } [(set_attr "type" "idiv") (set_attr "mode" "<MODE>")]) @@ -2569,7 +2569,7 @@ (define_insn "fix_truncsfsi2_insn" [(set (match_operand:SI 0 "register_operand" "=f") (fix:SI (match_operand:SF 1 "register_operand" "f")))] - "TARGET_HARD_FLOAT && ISA_HAS_TRUNC_W" + "TARGET_HARD_FLOAT && (ISA_HAS_TRUNC_W || TARGET_MIPS5900)" "trunc.w.s %0,%1" [(set_attr "type" "fcvt") (set_attr "mode" "SF") @@ -2580,7 +2580,7 @@ [(set (match_operand:SI 0 "register_operand" "=f") (fix:SI (match_operand:SF 1 "register_operand" "f"))) (clobber (match_scratch:SF 2 "=d"))] - "TARGET_HARD_FLOAT && !ISA_HAS_TRUNC_W" + "TARGET_HARD_FLOAT && !(ISA_HAS_TRUNC_W || TARGET_MIPS5900)" { if (set_nomacro) return ".set\tmacro\;trunc.w.s %0,%1,%2\;.set\tnomacro"; @@ -5306,7 +5306,7 @@ (const_int 0)]) (match_operand:GPR 2 "reg_or_0_operand" "dJ,0") (match_operand:GPR 3 "reg_or_0_operand" "0,dJ")))] - "ISA_HAS_CONDMOVE" + "ISA_HAS_CONDMOVE || TARGET_MIPS5900" "@ mov%T4\t%0,%z2,%1 mov%t4\t%0,%z3,%1" @@ -5336,7 +5336,7 @@ (if_then_else:GPR (match_dup 5) (match_operand:GPR 2 "reg_or_0_operand") (match_operand:GPR 3 "reg_or_0_operand")))] - "ISA_HAS_CONDMOVE" + "ISA_HAS_CONDMOVE || TARGET_MIPS5900" { gen_conditional_move (operands); DONE; diff -Nurp gcc-cvs-20131204/gcc/config/mips/t-linuxn32 gcc-cvs-20131204-ps2/gcc/config/mips/t-linuxn32 --- gcc-cvs-20131204/gcc/config/mips/t-linuxn32 1970-01-01 01:00:00.000000000 +0100 +++ gcc-cvs-20131204-ps2/gcc/config/mips/t-linuxn32 2013-01-04 23:37:09.769181544 +0100 @@ -0,0 +1,17 @@ +MULTILIB_OPTIONS = mabi=n32/mabi=32 +MULTILIB_DIRNAMES = n32 32 +MULTILIB_OSDIRNAMES = ../lib32 ../lib + +EXTRA_MULTILIB_PARTS=crtbegin.o crtend.o crtbeginS.o crtendS.o crtbeginT.o + +TPBIT = tp-bit.c + +tp-bit.c: $(srcdir)/config/fp-bit.c + echo '#ifdef __MIPSEL__' > tp-bit.c + echo '# define FLOAT_BIT_ORDER_MISMATCH' >> tp-bit.c + echo '#endif' >> tp-bit.c + echo '#if __LDBL_MANT_DIG__ == 113' >> tp-bit.c + echo '#define QUIET_NAN_NEGATED' >> tp-bit.c + echo '# define TFLOAT' >> tp-bit.c + cat $(srcdir)/config/fp-bit.c >> tp-bit.c + echo '#endif' >> tp-bit.c diff -Nurp gcc-cvs-20131204/gcc/config/mips/t-tpfloat gcc-cvs-20131204-ps2/gcc/config/mips/t-tpfloat --- gcc-cvs-20131204/gcc/config/mips/t-tpfloat 1970-01-01 01:00:00.000000000 +0100 +++ gcc-cvs-20131204-ps2/gcc/config/mips/t-tpfloat 2013-01-04 23:37:09.769181544 +0100 @@ -0,0 +1,11 @@ +TPBIT = tp-bit.c + +tp-bit.c: $(srcdir)/config/fp-bit.c + echo '#ifdef __MIPSEL__' > tp-bit.c + echo '# define FLOAT_BIT_ORDER_MISMATCH' >> tp-bit.c + echo '#endif' >> tp-bit.c + echo '#if __LDBL_MANT_DIG__ == 113' >> tp-bit.c + echo '#define QUIET_NAN_NEGATED' >> tp-bit.c + echo '# define TFLOAT' >> tp-bit.c + cat $(srcdir)/config/fp-bit.c >> tp-bit.c + echo '#endif' >> tp-bit.c diff -Nurp gcc-cvs-20131204/gcc/config.gcc gcc-cvs-20131204-ps2/gcc/config.gcc --- gcc-cvs-20131204/gcc/config.gcc 2005-10-12 22:54:46.000000000 +0200 +++ gcc-cvs-20131204-ps2/gcc/config.gcc 2013-01-05 00:38:52.113054589 +0100 @@ -545,6 +545,42 @@ case ${target} in esac case ${target} in +mips64r5900-* | mips64r5900el-*) + if test x$with_arch = x; then + with_arch="r5900" + fi + if test x$with_tune = x; then + with_tune="r5900" + fi + if test x$with_llsc = x; then + # R5900 doesn't support ll, sc, lld and scd instructions: + with_llsc=no + fi + if test x$with_float = x; then + # R5900 doesn't support 64 bit float: + with_float=soft + fi + ;; +mipsr5900-* | mipsr5900el-*) + if test x$with_arch = x; then + with_arch="r5900" + fi + if test x$with_tune = x; then + with_tune="r5900" + fi + if test x$with_llsc = x; then + # R5900 doesn't support ll, sc, lld and scd instructions: + with_llsc=no + fi + if test x$with_float = x; then + # R5900 doesn't support 64 bit float: + # The FPU of the r5900 supports 32 bit floating point. + with_float=single + fi + ;; +esac + +case ${target} in # Support site-specific machine types. *local*) rest=`echo ${target} | sed -e "s/$cpu_type-//"` @@ -1461,6 +1497,13 @@ mips*-*-netbsd*) # NetBSD/mips, either target_cpu_default="MASK_ABICALLS" tm_file="elfos.h ${tm_file} mips/elf.h netbsd.h netbsd-elf.h mips/netbsd.h" ;; +mips64r5900*-*-linux*) + tm_file="dbxelf.h elfos.h svr4.h linux.h ${tm_file} mips/linux.h mips/linuxn32.h" + tmake_file="${tmake_file} mips/t-linuxn32" + tm_defines="${tm_defines} MIPS_ABI_DEFAULT=ABI_N32" + gnu_ld=yes + gas=yes + ;; mips64*-*-linux*) tm_file="dbxelf.h elfos.h svr4.h linux.h ${tm_file} mips/linux.h mips/linux64.h" tmake_file="${tmake_file} mips/t-linux64" @@ -1520,11 +1563,18 @@ mipsisa64sb1-*-elf* | mipsisa64sb1el-*-e tm_defines="MIPS_ISA_DEFAULT=64 MIPS_CPU_STRING_DEFAULT=\\\"sb1\\\" MIPS_ABI_DEFAULT=ABI_O64" use_fixproto=yes ;; -mips-*-elf* | mipsel-*-elf*) +mips-*-elf* | mipsel-*-elf* | mipsr5900-*-elf* | mipsr5900el-*-elf*) tm_file="elfos.h ${tm_file} mips/elf.h" tmake_file=mips/t-elf use_fixproto=yes ;; +mips64r5900-*-elf* | mips64r5900el-*-elf*) + tm_file="elfos.h ${tm_file} mips/elf.h" + tmake_file="mips/t-elf mips/t-tpfloat" + target_cpu_default="MASK_64BIT" + tm_defines="${tm_defines} MIPS_ABI_DEFAULT=ABI_N32" + use_fixproto=yes + ;; mips64-*-elf* | mips64el-*-elf*) tm_file="elfos.h ${tm_file} mips/elf.h" tmake_file=mips/t-elf @@ -2761,7 +2811,7 @@ case "${target}" in done case ${with_float} in - "" | soft | hard) + "" | soft | hard | single | double) # OK ;; *) |