From: Bernard Blackham <bernard@bl...> - 2006-09-06 03:47:41
I searched the web far and wide for a Linux driver for the ISP1761, and
I finally found one that Philips (now NXP) released under the GPL on
SourceForge at http://sourceforge.net/projects/isp176x-hcd a few months
ago. They also have another project for the device-controller portion at
Their host controller driver is written for x86, a evaluation PCI card,
and Linux 2.6.9. I made a board with the ISP1761 hooked up to a Gumstix
in 16-bit mode and ported the driver to Linux 2.6.17 and the PXA255. It
seems to work happily reading a mass storage device. I haven't tried
isochronous transfers, or any kind of streaming, so I can't vouch for
that support (though the original driver claimed to have it, so it
shouldn't be too hard to get working if I've broken it).
I'm releasing the code for anybody else that wants to use it and I'll
update it as I find bugs, but I have no intentions of maintaining it
long term. As it stands, you'll need to adapt it to your board and
setup, but it shouldn't be too difficult. I would like to see it merge
into the kernel eventually, but I suspect it'll need a little more work
to get it there.
Code and diffs are at http://dagobah.ucc.asn.au/isp1761/ . The README is
below for the interested too.
ISP176x driver (version 18.104.22.168-gum1)
This driver for the ISP1761 on a Gumstix is adapted from version 22.214.171.124
of the ISP176x host driver released by Philips at
Changes from the original driver essentially involve:
- porting to Linux 2.6.17
- writing the HAL module hal_pxa.c
- The addition of gumstix-isp1761.c to point the driver at the relevant
The board it has been tested on has the ISP1761 wired up as follows:
- 16-bit data bus
- 17-bits of address lines straight through
- nCS on nCS2
- NPWE to nWR (VLIO)
- NOE to nRD
The gumstix-isp1761 module must be loaded before pehci, else the pehci
module will not load.
Porting to your port will involve editing gumstix-isp1761.c to find the
correct chip select lines, IRQ lines, and memory regions. A 32-bit data
bus will also require some changes to the mode register setting (set
upon reset) in pehci.c and hal_pxa.c.
Isochronous support has not been tested.
Probably i wont make use of this in the short time, probably in some near
future, so wanted to make the thanks.
I think something like this deserves a place in the wiki, jmho