From: wkjid10t <wkj...@gm...> - 2013-03-31 08:00:19
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Hi Scott. I just have a few quick questions regarding gumstix/SPI/GPIO's This is what i want to do: The gumstix-overo is going to be "mastering" 2 to 4 SPI (PIC24 - chips) devices. I want to use some of the GPIO's that the gumstix provides to "create" SPI-busses for each device. Is this even possible? What i have done towards the GPIO part is this: I have edited the u-boot overo.h board file and changed some GPIO's (Pin's; 170, 165, 184 for CLK, MOSI, MISO respectively) parameters, to essentially be the same as the dedicated SPI bus. My question specifically is this: Should i now "bind" spidev with these GPIO's? If so, how would i do this? How will i be able to access them using the spidev-drivers from Userspace? Do you think that i should instead work towards a custom driver for this (such as the one from Scott Ellis's tutorial: (http://www.jumpnowtek.com/index.php?option=com_content&view=article&id=57&Itemid=62)? And even so, how would i access the "new" GPIO/SPI bus? Thank you for the help. -- View this message in context: http://gumstix.8.n6.nabble.com/SPI-GPIO-binding-gumstix-tp4967091.html Sent from the Gumstix mailing list archive at Nabble.com. |
From: wkjid10t <wkj...@gm...> - 2013-03-31 19:35:28
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Upon further investigation, it seems that there are multiple SPI busses on the gumstix-overo (ti 3730). I can mux those GPIO's to their respective mcspix modes. BUT... After doing that, how do i know which pin(pinout) should i be hooking on to? I have both the summit board (which only has the 40-headers). And i have the Alcatraz-board that supposedly provides me with all pins. wkjid10t wrote > Hi Everyone > > I just have a few quick questions regarding gumstix/SPI/GPIO's > > This is what i want to do: > > The gumstix-overo is going to be "mastering" 2 to 4 SPI (PIC24 - chips) > devices. I want to use some of the GPIO's that the gumstix provides to > "create" SPI-busses for each device. > > Is this even possible? > > What i have done towards the GPIO part is this: > > I have edited the u-boot overo.h board file and changed some GPIO's > (Pin's; 170, 165, 184 for CLK, MOSI, MISO respectively) parameters, to > essentially be the same as the dedicated SPI bus. > > My question specifically is this: > > Should i now "bind" spidev with these GPIO's? If so, how would i do this? > > How will i be able to access them using the spidev-drivers from Userspace? > > Do you think that i should instead work towards a custom driver for this > (such as the one from Scott Ellis's tutorial: > (http://www.jumpnowtek.com/index.php?option=com_content&view=article&id=57&Itemid=62)? > > And even so, how would i access the "new" GPIO/SPI bus? > > Thank you for the help. -- View this message in context: http://gumstix.8.n6.nabble.com/SPI-GPIO-binding-gumstix-tp4967091p4967092.html Sent from the Gumstix mailing list archive at Nabble.com. |
From: wkjid10t <wkj...@gm...> - 2013-04-04 21:16:00
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So i have mcspi2 mux'd. I also have an Alcatraz board. How do i find which pin belongs to the mcspi2 mapping? I am using the Gumstix-Overo-FIRESTORM-COM, and as far as i understand this has the TI 3730 processor. According to that document, mcspi2 should be the same as the gpio 178-182 pins. So can somebody please tell me which pins are the actual pins that correlate to GPIO:178-182. Either on the gumstix J1, J4 connectors or on the Alcatraz board. Thank you for the help in advance -- View this message in context: http://gumstix.8.n6.nabble.com/SPI-GPIO-binding-gumstix-tp4967091p4967109.html Sent from the Gumstix mailing list archive at Nabble.com. |
From: the s. e. <sui...@gm...> - 2013-04-04 21:36:42
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Here is the alcatraz pinout, all pins are labeled: http://pubs.gumstix.com/boards/ALCATRAZ/R3751/B30022.pdf Here is the 3730 TRM, page 2448 lists the operating modes for the pad configuration registers. http://www.ti.com/lit/ug/sprugn4r/sprugn4r.pdf At this point, it's just a matter of pairing up which GPIOs you can export the interface to, versus which GPIOs are being brought out to the 70-pin headers on the Gumstix. Unfortunately, it appears that gpio178-182 are not brought out to the 70-pin headers on the Gumstix, and since those are the only GPIOs that you can mux MCSPI2 out on, you can't use it. However, you can bring mcspi1_cs2 out on gpio176, which should let you control three SPI devices on MCSPI1 (cs0, cs1, and cs2). cs3 (gpio177) isn't available though. -- View this message in context: http://gumstix.8.n6.nabble.com/SPI-GPIO-binding-gumstix-tp4967091p4967110.html Sent from the Gumstix mailing list archive at Nabble.com. |
From: wkjid10t <wkj...@gm...> - 2013-04-04 21:44:50
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Thanks, I appreciate the quick response. I've been looking at that TI doc for a while now. Quick 2 questions: How did/do you know that the gpio178-182 pins are not brought out to the 70-pin header? I want to make mcspi3, and mcspi4 available too. How would i find out if those GPIO's are brought out to the 70-pin or not. Or could you advise me if they are or not. Thank you -- View this message in context: http://gumstix.8.n6.nabble.com/SPI-GPIO-binding-gumstix-tp4967091p4967111.html Sent from the Gumstix mailing list archive at Nabble.com. |
From: the s. e. <sui...@gm...> - 2013-04-04 22:47:00
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The GPIOs that are brought out on the Gumstix are labeled as such. If you just do a search in the TRM for "mcspi3" you can see where it can be brought out mcspi3_clk - gpio88 or gpio130 or gpio17 mcspi3_simo - gpio89 or gpio131 or gpio14 mcspi3_somi - gpio90 or gpio132 or gpio15 mcspi3_cs0 - gpio91 or gpio135 or gpio16 mcspi3_cs1 - gpio92 or gpio134 or gpio21 mcspi4_clk - gpio151 or gpio156 mcspi4_simo - gpio158 mcspi4_somi - gpio159 mcspi4_cs0 - gpio161 Of those, it looks like you have access to 14, 17, 21, 88, 89, 90, 91, 92, and 151 So mcspi4 is out, but you shouldn't have a problem with mcspi3. -- View this message in context: http://gumstix.8.n6.nabble.com/SPI-GPIO-binding-gumstix-tp4967091p4967112.html Sent from the Gumstix mailing list archive at Nabble.com. |
From: wkjid10t <wkj...@gm...> - 2013-04-04 23:32:42
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OK. That's what i figured. How do you know which GPIO pins are "accessible". Did you find this via that alcatraz pinout? Is this because the Overo was just designed to not have access to that large a range of GPIO's? -- View this message in context: http://gumstix.8.n6.nabble.com/SPI-GPIO-binding-gumstix-tp4967091p4967113.html Sent from the Gumstix mailing list archive at Nabble.com. |
From: the s. e. <sui...@gm...> - 2013-04-05 14:52:12
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Yes, from the Alcatraz schematics. I'm sure board real estate has a lot to do with it, there's just not enough room to bring out every single GPIO. Also, many of those pins are used internally for MMC, wifi, bluetooth, etc, so even if they were brought out to the 70 pin headers you wouldn't be able to use them anyway. -- View this message in context: http://gumstix.8.n6.nabble.com/SPI-GPIO-binding-gumstix-tp4967091p4967114.html Sent from the Gumstix mailing list archive at Nabble.com. |
From: wkjid10t <wkj...@gm...> - 2013-04-05 20:28:24
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Interesting. Thank you very much. I appreciate the help. -- View this message in context: http://gumstix.8.n6.nabble.com/SPI-GPIO-binding-gumstix-tp4967091p4967115.html Sent from the Gumstix mailing list archive at Nabble.com. |