#1) Is the Vsystem signal on J5 a direct connection to the Vsystem signals on J1/J4?

#2) Do all the Vsystem pins, on J1 and J4, go directly to the PMIC "Vbat" regulator inputs as shown in Figure 4-1 of the TPS65950 datasheet and all the Vbat* named signals from Table 2-2?

#3) J1 pin 65 is labeled POWERON but it didn't look like it was used on the Tobi or Summit expansion boards. Per the TPS65950 datasheet (Table 2-1) this signal is referenced to the VBAT power input on the TPS65950 and had no internal pullup. So does it have a pullup to Vsystem on the Overo COM?
 
#4) J4 pin 41 is labeled GPIO114_SPI1_NRQ. I don't see SPI NRQ as an OMAP defined function. So that is just OMAP GPIO114 and can be used for other GPIO purposes, right?

#5) J1 pin 1 is labeled N_MANUAL_RESET. Does that go to the NRESWARM pin on the PMIC?
Thanks
 
C W Hinkle
Ascendant Engineering Solutions
Austin, TX