Thanks Elvis,
 
Added the changes to board_mux in board-overo.c and rebuilt the kernel.  Works fine.
 


From: Elvis Dowson [mailto:elvis.dowson@mac.com]
Sent: Thursday, May 06, 2010 4:57 PM
To: General mailing list for gumstix users.
Subject: Re: [Gumstix-users] Using UART 2 on an Overo

Hi,

On May 6, 2010, at 6:21 PM, Bernhard Wörndl-Aichriedler wrote:

As far as I see, UART2 is not wired to any connector -> no.

The OMAP3 chip uses pin muxing, so internally it has many devices but you only have a lesser number of physical pin outs. So, you can set the pin muxing, to bring out a specific internal chip function, out to a particular connector. 

Here is a patch that you can apply to u-boot to disable bluetooth and enable UART 2. You can add this patch to your u-boot OpenEmbedded recipe and build u-boot. This approach sets the pin muxing at boottime. Another option is to reconfigure it in the kernel, although I haven't attempt that.

Best regards,

Elvis Dowson



diff --git a/board/omap3/overo/overo.h b/board/omap3/overo/overo.h
index 0b59120..59dc76d 100644
--- a/board/omap3/overo/overo.h
+++ b/board/omap3/overo/overo.h
@@ -213,14 +213,14 @@ const omap3_sysinfo sysinfo = {
  MUX_VAL(CP(MMC2_DAT6), (IEN  | PTU | EN  | M1)) /*MMC2_DIR_CMD*/\
  MUX_VAL(CP(MMC2_DAT7), (IEN  | PTU | EN  | M1)) /*MMC2_CLKIN*/\
  /*Bluetooth*/\
- MUX_VAL(CP(MCBSP3_DX), (IEN  | PTD | DIS | M1)) /*UART2_CTS*/\
- MUX_VAL(CP(MCBSP3_DR), (IDIS | PTD | DIS | M1)) /*UART2_RTS*/\
- MUX_VAL(CP(MCBSP3_CLKX), (IDIS | PTD | DIS | M1)) /*UART2_TX*/\
- MUX_VAL(CP(MCBSP3_FSX), (IEN  | PTD | DIS | M1)) /*UART2_RX*/\
+ MUX_VAL(CP(MCBSP3_DX), (IDIS | PTD | DIS | M0)) /*McBSP3_DX*/\
+ MUX_VAL(CP(MCBSP3_DR), (IDIS | PTD | DIS | M0)) /*McBSP3_DR*/\
+ MUX_VAL(CP(MCBSP3_CLKX), (IDIS | PTD | DIS | M0)) /*McBSP3_CLKX*/\
+ MUX_VAL(CP(MCBSP3_FSX), (IDIS | PTD | DIS | M0)) /*McBSP3_FSX*/\
  MUX_VAL(CP(UART2_CTS), (IEN  | PTD | DIS | M4)) /*GPIO_144 - LCD_EN*/\
  MUX_VAL(CP(UART2_RTS), (IEN  | PTD | DIS | M4)) /*GPIO_145*/\
- MUX_VAL(CP(UART2_TX), (IEN  | PTD | DIS | M4)) /*GPIO_146*/\
- MUX_VAL(CP(UART2_RX), (IEN  | PTD | DIS | M4)) /*GPIO_147*/\
+ MUX_VAL(CP(UART2_TX), (IDIS | PTD | DIS | M0)) /*UART2_TX*/\
+ MUX_VAL(CP(UART2_RX), (IEN  | PTD | DIS | M0)) /*UART2_RX*/\
  MUX_VAL(CP(UART1_TX), (IDIS | PTD | DIS | M0)) /*UART1_TX*/\
  MUX_VAL(CP(UART1_RTS), (IEN  | PTU | DIS | M4)) /*GPIO_149*/ \
  MUX_VAL(CP(UART1_CTS), (IEN  | PTU | DIS | M4)) /*GPIO_150-MMC3_WP*/\
-- 
1.6.0.3



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