From: Dave A. <ai...@gm...> - 2009-04-22 09:11:45
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From: Dave Airlie <ai...@li...> On radeon at least this seems to solve a lot of our monitor misdetections. I suppose its possible if we are the end of a jiffy interval and we don't have 2.2ms left we could timeout early. Signed-off-by: Dave Airlie <ai...@re...> --- drivers/gpu/drm/i915/intel_i2c.c | 4 +++- 1 files changed, 3 insertions(+), 1 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_i2c.c b/drivers/gpu/drm/i915/intel_i2c.c index 5ee9d4c..20df92f 100644 --- a/drivers/gpu/drm/i915/intel_i2c.c +++ b/drivers/gpu/drm/i915/intel_i2c.c @@ -144,7 +144,9 @@ struct intel_i2c_chan *intel_i2c_create(struct drm_device *dev, const u32 reg, chan->algo.getsda = get_data; chan->algo.getscl = get_clock; chan->algo.udelay = 20; - chan->algo.timeout = usecs_to_jiffies(2200); + /* use 2 jiffies even though vesa mandate 2.2ms, + * as there seems to be an issue with a single jiffy */ + chan->algo.timeout = 2; chan->algo.data = chan; i2c_set_adapdata(&chan->adapter, chan); -- 1.6.0.6 |