Re: [Dri-devel] Mach64 PCI support added to 2D driver

[Tony R. <to...@ro...>]

"Jos=E9 Fonseca" wrote:

> On 2002.04.13 04:36 Leif Delgass wrote:
> > On Thu, 11 Apr 2002, Jos=E9 Fonseca wrote:
> >
> > Do we know for sure that pci gart is supported on mach64?  The rage 1=
28
> > and radeon drivers both write to PCI GART registers, but I don't see
> > anything analogous in the Rage PRO docs.  My understanding is that to=
 use
> > the scatter/gather memory, the card has to implement it's own address
> > translation table.  Your checkin adds allocation of scatter/gather
> > memory, but can PCI mach64 use this memory?
> >

FINALLY

dri/mach64 runs on my sony PCG-C1VP (no AGP guaranteed :-)
This is a major step forward for me ...

Do you need any info ???? Just tell me and I send it to you.

THANKS

/Tony


Some info anyway (it always crashed in the output before, now it run out =
of
the box):

Apr 15 14:58:17 localhost kernel: [drm] Initialized mach64 1.0.0 20010107=
 on
minor 0

Apr 15 14:59:10 localhost kernel: [drm] SRC_CNTL =3D 0x00000000
Apr 15 14:59:10 localhost kernel: [drm]
Apr 15 14:59:10 localhost kernel: [drm] data  =3D 0x002ec000
Apr 15 14:59:10 localhost kernel: [drm] table =3D 0x00004000
Apr 15 14:59:10 localhost kernel: [drm] starting DMA transfer...
Apr 15 14:59:10 localhost kernel: [drm] starting DMA transfer... done.
Apr 15 14:59:10 localhost kernel: [drm] waiting for idle
[locked_after_dma??]...Apr 15 14:59:10 localhost kernel: [drm] (After DMA
Transfer) PAT_REG0 =3D 0x22222222
Apr 15 14:59:10 localhost kernel: [drm] freeing memory.
Apr 15 14:59:10 localhost kernel: [drm] returning ...