The low level driver rtc_lld_init in ..../STM32/RTCv1/rtc_lld.c configures the RTC driver on reset without enabling the power and backup interface clocks.
Furtemore, the last update introduced a backup of PRLL in BKP registers (see bug 3567597) without enabling the Backup Domain write access bit.
According to RM0008 cls 18.1 & 6.1 :
After reset, access to the Backup registers and RTC is disabled and the Backup domain (BKP) is protected against possible parasitic write access. To enable access to the Backup registers and the RTC, proceed as follows:
● enable the power and backup interface clocks by setting the PWREN and BKPEN bits
in the RCC_APB1ENR register
● set the DBP bit the Power Control Register (PWR_CR) to enable access to the Backup registers and RTC.
In fact, the driver is not functionnal after a cold start (without batt volatge).
See attached file including 3 macros for register configuration