From: Dominik B. <li...@do...> - 2004-03-17 10:17:11
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On Tue, Mar 16, 2004 at 11:40:57PM -0500, Dmitry Torokhov wrote: > On Tuesday 16 March 2004 08:33 pm, Peter Chubb wrote: > > >>>>> "Dmitry" =3D=3D Dmitry Torokhov <dto...@am...> writes: > >=20 > > Dmitry> On Tuesday 16 March 2004 07:13 pm, Karol Kozimor wrote: > > >> Thus wrote john stultz: > Hmm. This is untested, but I think this > > >> should do the trick. > > >>=20 > > >> Hmm... without the patch, neither cpu MHz nor bogomips are updated, > > >> with the patch cpu MHz value seems correct (both using acpi.ko and > > >> speedstep-ich.ko, but the bogomips is still at its initial value. > > >> Best regards, > > >>=20 > >=20 > > Dmitry> Karol, do you have a P4? AFAIK P4's TSC is stable even if core > > Dmitry> frequence changes so loop_per_juffy (=3D=3D bogomips) need not = be > > Dmitry> updated. > >=20 > > The TSC is variable rate for Pentium-IV if you're using clock > > modulation. > >=20 > > Peter C > >=20 >=20 > I understand that by clock modulation you mean throttling as opposed to > true SpeedStep... OK, that means that for P4+ we somehow need to figure > out whether the CPU is throttled or not to correctly calculate delays. > Is there a clean way to get this data? Hm, will have one patch to test it ready later today -- and a basic patch to do this distinction is in the hiding of my notebook's harddisk already... who's willing to do some testing on his SpeedStep-capable Pentium 4 - Mobil= e. Dominik |