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RE: [Unichrome-users] X server hangs using 100% CPU on MII andnewer M10K boards

From: Thomas <unichrome@sh...> - 2004-09-30 13:46

Hi, Barry.

> The patch has not cured the problem. It may be taking longer to go wron=
g,
> I'll know tomorrow for sure. Normally I see about 28 hangs every 24 hou=
rs.
>
>> 1. Try to alter the "hqvdisablepatch" behaviour as well. It may well b=
e
>> that VIA has fixed a previous hw bug in these new chipsets.
>
> What did you have in mind here?

Try to disable the "HQVDisablePatch" for CLE CX in via_swov.c. It's
enabled by default for this hardware.

Otherwise this is probably a dead end without input from VIA. I'm not sur=
e
whether this is an option for you, but if you try and install VIA's lates=
t
binary drivers and see if the problem persists, this should go to VIA as =
a
hardware bug. Since they are the only ones to know how the firmware
works, they are the only ones likely to come up with a solution. I don't
know how many hours I've spent trying to make the MPEG interrupt work
until I got the word from VIA that it just didn't.

I'll check the register values fed to the HQV just before hang, though.
They are in your log.

Since, as I understand it, you're a commercial user, VIA would probably b=
e
more responsive than they usually are. Also, a normal user that didn't
stress the HQV in this way, would probably just ignore an occasional
lockup so it is possible that VIA just doesn't know about it, and it is
also possible that there is no simple workaround.

Regards,
Thomas


>
> Barry
>
>
>
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Thread View

Thread	Author	Date
[Unichrome-users] X server hangs using 100% CPU on MII and newer M10K boards	Barry Scott <barry.scott@on...>

Re: [Unichrome-users] X server hangs using 100% CPU on MII andnewer M10K boards

From: Thomas <unichrome@sh...> - 2004-09-23 15:06

Barry,

Please upgrade to r26. There's a bugfix in there that fixes a bug that
could cause XvPutimage to access uninitialized data.

/Thomas




> We are seeing X hang after a few hours of playing mpeg2 movies with Xin=
e
> and flash with mozilla.
>
> I have build XFree86 4.4.0 with Unichrome r25 added with -g to get
> symbols.
> The kernel is 2.4.25 with the epia2 patches.
>
> I can attach gdb to the X server and get the following stack trace:
>
> #0  0x40205cc1 in ?? ()
> #1  0x402050ca in ?? ()
> #2  0x40205b81 in ?? ()
> #3  0x40201835 in ?? ()
> #4  0x4020c79d in ?? ()
> #5  0x080c0d90 in xf86XVPutImage (client=3D0x88a6c40, pDraw=3D0x8895d78=
,
> pPort=3D0x88eb780, pGC=3D0x8896268,
>     src_x=3D0, src_y=3D0, src_w=3D320, src_h=3D240, drw_x=3D0, drw_y=3D=
0, drw_w=3D300,
> drw_h=3D225, format=3D0x88eb518,
>     data=3D0x4431e000
> "\032\032\032\032\032\032\031\031\031\031\031\032\032\032\032\032\032\0=
32\03
> 2\032\031\031\031\031\031\031\032\032\032\032\e\e", '\032' <repeats 153
> times>, "\031\031\031\031\031\031\031\032\032\032\032\032\032\032\032".=
..,
> sync=3D1, width=3D320, height=3D240) at xf86xv.c:1769
> #6  0x0831eb7e in ?? ()
> #7  0x0832625d in ?? ()
> #8  0x08323ab3 in ?? ()
> #9  0x080cf10d in Dispatch () at dispatch.c:446
> #10 0x080e5920 in main (argc=3D4, argv=3D0xbffffdb4, envp=3D0xbffffdc8)=
 at
> main.c:432
> #11 0x40064c57 in __libc_start_main () from /lib/i686/libc.so.6
>
> This always hangs on EPIA MII boards and on current shipping EPIA M 10K
> boards. Older EPIA M 10M boards do not have the problem. lspci -vv from
> old and new boards shows one difference that might be interesting,
> the Status 66MHz- changes to 66MHz+. What does that status mean?
>
>  01:00.0 VGA compatible controller: VIA Technologies, Inc. VT8623 [Apol=
lo
> CLE266] integrated CastleRock graphics (rev 03) (prog-if 00 [VGA])
>         Subsystem: VIA Technologies, Inc. VT8623 [Apollo CLE266]
> integrated
> CastleRock graphics
>         Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop-
> ParErr-
> Stepping- SERR- FastB2B-
> -       Status: Cap+ 66Mhz- UDF- FastB2B- ParErr- DEVSEL=3Dmedium >TAbo=
rt-
> <TAbort- <MAbort- >SERR- <PERR-
> +       Status: Cap+ 66Mhz+ UDF- FastB2B- ParErr- DEVSEL=3Dmedium >TAbo=
rt-
> <TAbort- <MAbort- >SERR- <PERR-
>         Latency: 32 (500ns min)
>         Interrupt: pin A routed to IRQ 11
> -       Region 0: Memory at e4000000 (32-bit, prefetchable) [size=3D64M=
]
> -       Region 1: Memory at e8000000 (32-bit, non-prefetchable) [size=3D=
16M]
> +       Region 0: Memory at d8000000 (32-bit, prefetchable) [size=3D64M=
]
> +       Region 1: Memory at dc000000 (32-bit, non-prefetchable) [size=3D=
16M]
>         Expansion ROM at <unassigned> [disabled] [size=3D64K]
>         Capabilities: [60] Power Management version 2
>                 Flags: PMEClk- DSI+ D1+ D2+ AuxCurrent=3D0mA
> PME(D0-,D1-,D2-,D3hot-,D3cold-)
>
> Does anyone have any idea what code is at 0x40205cc1 and why its hung?
> How do I get symbols for the code that I assume XFree86 has loaded into
> memory?
>
> Barry
>
>
>
>
> -------------------------------------------------------
> This SF.Net email is sponsored by: YOU BE THE JUDGE. Be one of 170
> Project Admins to receive an Apple iPod Mini FREE for your judgement on
> who ports your project to Linux PPC the best. Sponsored by IBM.
> Deadline: Sept. 24. Go here: http://sf.net/ppc_contest.php
> _______________________________________________
> Unichrome-users mailing list
> Unichrome-users@...
> https://lists.sourceforge.net/lists/listinfo/unichrome-users
>

RE: [Unichrome-users] X server hangs using 100% CPU on MII andnewer M10K boards

From: Barry Scott <barry.scott@on...> - 2004-09-24 09:48

r26 hangs as well on CLE266 ChipRev 17 and 18. ChipRev 3 still works.

How can I help debug this?

Still this all works on a ChipRev 3 we wonderer is one of the ChipRev
specific bits of code that is run on a 3 also needs to run on a 17/18?

Barry

> -----Original Message-----
> From: unichrome-users-admin@...
> [mailto:unichrome-users-admin@... Behalf Of Thomas
> Hellström
> Sent: 23 September 2004 16:06
> To: Barry Scott
> Cc: unichrome-users@...
> Subject: Re: [Unichrome-users] X server hangs using 100% CPU on MII
> andnewer M10K boards
>
>
> Barry,
>
> Please upgrade to r26. There's a bugfix in there that fixes a bug that
> could cause XvPutimage to access uninitialized data.
>
> /Thomas
>
>
>
>
> > We are seeing X hang after a few hours of playing mpeg2 movies with Xine
> > and flash with mozilla.
> >
> > I have build XFree86 4.4.0 with Unichrome r25 added with -g to get
> > symbols.
> > The kernel is 2.4.25 with the epia2 patches.
> >
> > I can attach gdb to the X server and get the following stack trace:
> >
> > #0  0x40205cc1 in ?? ()
> > #1  0x402050ca in ?? ()
> > #2  0x40205b81 in ?? ()
> > #3  0x40201835 in ?? ()
> > #4  0x4020c79d in ?? ()
> > #5  0x080c0d90 in xf86XVPutImage (client=0x88a6c40, pDraw=0x8895d78,
> > pPort=0x88eb780, pGC=0x8896268,
> >     src_x=0, src_y=0, src_w=320, src_h=240, drw_x=0, drw_y=0, drw_w=300,
> > drw_h=225, format=0x88eb518,
> >     data=0x4431e000
> >
> "\032\032\032\032\032\032\031\031\031\031\031\032\032\032\032\032\
> 032\032\03
> > 2\032\031\031\031\031\031\031\032\032\032\032\e\e", '\032' <repeats 153
> > times>,
> "\031\031\031\031\031\031\031\032\032\032\032\032\032\032\032"...,
> > sync=1, width=320, height=240) at xf86xv.c:1769
> > #6  0x0831eb7e in ?? ()
> > #7  0x0832625d in ?? ()
> > #8  0x08323ab3 in ?? ()
> > #9  0x080cf10d in Dispatch () at dispatch.c:446
> > #10 0x080e5920 in main (argc=4, argv=0xbffffdb4, envp=0xbffffdc8) at
> > main.c:432
> > #11 0x40064c57 in __libc_start_main () from /lib/i686/libc.so.6
> >
> > This always hangs on EPIA MII boards and on current shipping EPIA M 10K
> > boards. Older EPIA M 10M boards do not have the problem. lspci -vv from
> > old and new boards shows one difference that might be interesting,
> > the Status 66MHz- changes to 66MHz+. What does that status mean?
> >
> >  01:00.0 VGA compatible controller: VIA Technologies, Inc.
> VT8623 [Apollo
> > CLE266] integrated CastleRock graphics (rev 03) (prog-if 00 [VGA])
> >         Subsystem: VIA Technologies, Inc. VT8623 [Apollo CLE266]
> > integrated
> > CastleRock graphics
> >         Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop-
> > ParErr-
> > Stepping- SERR- FastB2B-
> > -       Status: Cap+ 66Mhz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort-
> > <TAbort- <MAbort- >SERR- <PERR-
> > +       Status: Cap+ 66Mhz+ UDF- FastB2B- ParErr- DEVSEL=medium >TAbort-
> > <TAbort- <MAbort- >SERR- <PERR-
> >         Latency: 32 (500ns min)
> >         Interrupt: pin A routed to IRQ 11
> > -       Region 0: Memory at e4000000 (32-bit, prefetchable) [size=64M]
> > -       Region 1: Memory at e8000000 (32-bit, non-prefetchable)
> [size=16M]
> > +       Region 0: Memory at d8000000 (32-bit, prefetchable) [size=64M]
> > +       Region 1: Memory at dc000000 (32-bit, non-prefetchable)
> [size=16M]
> >         Expansion ROM at <unassigned> [disabled] [size=64K]
> >         Capabilities: [60] Power Management version 2
> >                 Flags: PMEClk- DSI+ D1+ D2+ AuxCurrent=0mA
> > PME(D0-,D1-,D2-,D3hot-,D3cold-)
> >
> > Does anyone have any idea what code is at 0x40205cc1 and why its hung?
> > How do I get symbols for the code that I assume XFree86 has loaded into
> > memory?
> >
> > Barry
> >
> >
> >
> >
> > -------------------------------------------------------
> > This SF.Net email is sponsored by: YOU BE THE JUDGE. Be one of 170
> > Project Admins to receive an Apple iPod Mini FREE for your judgement on
> > who ports your project to Linux PPC the best. Sponsored by IBM.
> > Deadline: Sept. 24. Go here: http://sf.net/ppc_contest.php
> > _______________________________________________
> > Unichrome-users mailing list
> > Unichrome-users@...
> > https://lists.sourceforge.net/lists/listinfo/unichrome-users
> >
>
>
>
>
> -------------------------------------------------------
> This SF.Net email is sponsored by: YOU BE THE JUDGE. Be one of 170
> Project Admins to receive an Apple iPod Mini FREE for your judgement on
> who ports your project to Linux PPC the best. Sponsored by IBM.
> Deadline: Sept. 24. Go here: http://sf.net/ppc_contest.php
> _______________________________________________
> Unichrome-users mailing list
> Unichrome-users@...
> https://lists.sourceforge.net/lists/listinfo/unichrome-users
>
>

RE: [Unichrome-users] X server hangs using 100% CPU on MII andnewer M10K boards

From: Barry Scott <barry.scott@on...> - 2004-09-24 15:43

I'm trying to debug this problem. Since gdb has no idea of where the
code is loaded in memory I've patched XFree86 loadmod.c to
print where it loads modules and I've just patched via_video.c to print
where it is loaded. I'm hoping that with these addresses I can figure out
which code is looping.

How do you debug this driver code? This all seems to be a bit to close
to hex dump then symbolic debugging.

Barry

> -----Original Message-----
> From: unichrome-users-admin@...
> [mailto:unichrome-users-admin@... Behalf Of Thomas
> Hellström
> Sent: 23 September 2004 16:06
> To: Barry Scott
> Cc: unichrome-users@...
> Subject: Re: [Unichrome-users] X server hangs using 100% CPU on MII
> andnewer M10K boards
>
>
> Barry,
>
> Please upgrade to r26. There's a bugfix in there that fixes a bug that
> could cause XvPutimage to access uninitialized data.
>
> /Thomas
>
>
>
>
> > We are seeing X hang after a few hours of playing mpeg2 movies with Xine
> > and flash with mozilla.
> >
> > I have build XFree86 4.4.0 with Unichrome r25 added with -g to get
> > symbols.
> > The kernel is 2.4.25 with the epia2 patches.
> >
> > I can attach gdb to the X server and get the following stack trace:
> >
> > #0  0x40205cc1 in ?? ()
> > #1  0x402050ca in ?? ()
> > #2  0x40205b81 in ?? ()
> > #3  0x40201835 in ?? ()
> > #4  0x4020c79d in ?? ()
> > #5  0x080c0d90 in xf86XVPutImage (client=0x88a6c40, pDraw=0x8895d78,
> > pPort=0x88eb780, pGC=0x8896268,
> >     src_x=0, src_y=0, src_w=320, src_h=240, drw_x=0, drw_y=0, drw_w=300,
> > drw_h=225, format=0x88eb518,
> >     data=0x4431e000
> >
> "\032\032\032\032\032\032\031\031\031\031\031\032\032\032\032\032\
> 032\032\03
> > 2\032\031\031\031\031\031\031\032\032\032\032\e\e", '\032' <repeats 153
> > times>,
> "\031\031\031\031\031\031\031\032\032\032\032\032\032\032\032"...,
> > sync=1, width=320, height=240) at xf86xv.c:1769
> > #6  0x0831eb7e in ?? ()
> > #7  0x0832625d in ?? ()
> > #8  0x08323ab3 in ?? ()
> > #9  0x080cf10d in Dispatch () at dispatch.c:446
> > #10 0x080e5920 in main (argc=4, argv=0xbffffdb4, envp=0xbffffdc8) at
> > main.c:432
> > #11 0x40064c57 in __libc_start_main () from /lib/i686/libc.so.6
> >
> > This always hangs on EPIA MII boards and on current shipping EPIA M 10K
> > boards. Older EPIA M 10M boards do not have the problem. lspci -vv from
> > old and new boards shows one difference that might be interesting,
> > the Status 66MHz- changes to 66MHz+. What does that status mean?
> >
> >  01:00.0 VGA compatible controller: VIA Technologies, Inc.
> VT8623 [Apollo
> > CLE266] integrated CastleRock graphics (rev 03) (prog-if 00 [VGA])
> >         Subsystem: VIA Technologies, Inc. VT8623 [Apollo CLE266]
> > integrated
> > CastleRock graphics
> >         Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop-
> > ParErr-
> > Stepping- SERR- FastB2B-
> > -       Status: Cap+ 66Mhz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort-
> > <TAbort- <MAbort- >SERR- <PERR-
> > +       Status: Cap+ 66Mhz+ UDF- FastB2B- ParErr- DEVSEL=medium >TAbort-
> > <TAbort- <MAbort- >SERR- <PERR-
> >         Latency: 32 (500ns min)
> >         Interrupt: pin A routed to IRQ 11
> > -       Region 0: Memory at e4000000 (32-bit, prefetchable) [size=64M]
> > -       Region 1: Memory at e8000000 (32-bit, non-prefetchable)
> [size=16M]
> > +       Region 0: Memory at d8000000 (32-bit, prefetchable) [size=64M]
> > +       Region 1: Memory at dc000000 (32-bit, non-prefetchable)
> [size=16M]
> >         Expansion ROM at <unassigned> [disabled] [size=64K]
> >         Capabilities: [60] Power Management version 2
> >                 Flags: PMEClk- DSI+ D1+ D2+ AuxCurrent=0mA
> > PME(D0-,D1-,D2-,D3hot-,D3cold-)
> >
> > Does anyone have any idea what code is at 0x40205cc1 and why its hung?
> > How do I get symbols for the code that I assume XFree86 has loaded into
> > memory?
> >
> > Barry
> >
> >
> >
> >
> > -------------------------------------------------------
> > This SF.Net email is sponsored by: YOU BE THE JUDGE. Be one of 170
> > Project Admins to receive an Apple iPod Mini FREE for your judgement on
> > who ports your project to Linux PPC the best. Sponsored by IBM.
> > Deadline: Sept. 24. Go here: http://sf.net/ppc_contest.php
> > _______________________________________________
> > Unichrome-users mailing list
> > Unichrome-users@...
> > https://lists.sourceforge.net/lists/listinfo/unichrome-users
> >
>
>
>
>
> -------------------------------------------------------
> This SF.Net email is sponsored by: YOU BE THE JUDGE. Be one of 170
> Project Admins to receive an Apple iPod Mini FREE for your judgement on
> who ports your project to Linux PPC the best. Sponsored by IBM.
> Deadline: Sept. 24. Go here: http://sf.net/ppc_contest.php
> _______________________________________________
> Unichrome-users mailing list
> Unichrome-users@...
> https://lists.sourceforge.net/lists/listinfo/unichrome-users
>
>

Re: [Unichrome-users] X server hangs using 100% CPU on MII andnewer M10K boards

From: Thomas Hellstrom <unichrome@sh...> - 2004-09-26 14:25

Attachments: Message as HTML

Hi, Barry!


Barry Scott wrote:

>I'm trying to debug this problem. Since gdb has no idea of where the
>code is loaded in memory I've patched XFree86 loadmod.c to
>print where it loads modules and I've just patched via_video.c to print
>where it is loaded. I'm hoping that with these addresses I can figure ou=
t
>which code is looping.
>
>How do you debug this driver code? This all seems to be a bit to close
>to hex dump then symbolic debugging.
>
>Barry
> =20
>
Defining XV_DEBUG in via_video.h and via_swov.h would give you a much=20
more verbose log.

If the hang occurs in the middle of playing it seems like the wait for=20
the HQV engine to flip
an image is what's stuck. That would, on the other hand, seem to=20
indicate a hardware bug.

One thing to try would be a timeout in the flip wait. A typical HQV flip=20
of a DVD image makes the engine busy
15-17 ms on the CLE266.

If this is not the cause one would have to delve into the via_swov.c  cod=
e.
One major difference between the revisions is that for earlier CLE266=20
chips the HQVInitpatch is enabled in the beginning of  the via_swov.c=20
file. That is not the case for later revisions. You might try to enable=20
that one and see if there is a
difference.

/Thomas





> =20
>
>>-----Original Message-----
>>From: unichrome-users-admin@...
>>[mailto:unichrome-users-admin@... Behalf Of Thomas
>>Hellstr=F6m
>>Sent: 23 September 2004 16:06
>>To: Barry Scott
>>Cc: unichrome-users@...
>>Subject: Re: [Unichrome-users] X server hangs using 100% CPU on MII
>>andnewer M10K boards
>>
>>
>>Barry,
>>
>>Please upgrade to r26. There's a bugfix in there that fixes a bug that
>>could cause XvPutimage to access uninitialized data.
>>
>>/Thomas
>>
>>
>>
>>
>>   =20
>>
>>>We are seeing X hang after a few hours of playing mpeg2 movies with Xi=
ne
>>>and flash with mozilla.
>>>
>>>I have build XFree86 4.4.0 with Unichrome r25 added with -g to get
>>>symbols.
>>>The kernel is 2.4.25 with the epia2 patches.
>>>
>>>I can attach gdb to the X server and get the following stack trace:
>>>
>>>#0  0x40205cc1 in ?? ()
>>>#1  0x402050ca in ?? ()
>>>#2  0x40205b81 in ?? ()
>>>#3  0x40201835 in ?? ()
>>>#4  0x4020c79d in ?? ()
>>>#5  0x080c0d90 in xf86XVPutImage (client=3D0x88a6c40, pDraw=3D0x8895d7=
8,
>>>pPort=3D0x88eb780, pGC=3D0x8896268,
>>>    src_x=3D0, src_y=3D0, src_w=3D320, src_h=3D240, drw_x=3D0, drw_y=3D=
0, drw_w=3D300,
>>>drw_h=3D225, format=3D0x88eb518,
>>>    data=3D0x4431e000
>>>
>>>     =20
>>>
>>"\032\032\032\032\032\032\031\031\031\031\031\032\032\032\032\032\
>>032\032\03
>>   =20
>>
>>>2\032\031\031\031\031\031\031\032\032\032\032\e\e", '\032' <repeats 15=
3
>>>times>,
>>>     =20
>>>
>>"\031\031\031\031\031\031\031\032\032\032\032\032\032\032\032"...,
>>   =20
>>
>>>sync=3D1, width=3D320, height=3D240) at xf86xv.c:1769
>>>#6  0x0831eb7e in ?? ()
>>>#7  0x0832625d in ?? ()
>>>#8  0x08323ab3 in ?? ()
>>>#9  0x080cf10d in Dispatch () at dispatch.c:446
>>>#10 0x080e5920 in main (argc=3D4, argv=3D0xbffffdb4, envp=3D0xbffffdc8=
) at
>>>main.c:432
>>>#11 0x40064c57 in __libc_start_main () from /lib/i686/libc.so.6
>>>
>>>This always hangs on EPIA MII boards and on current shipping EPIA M 10=
K
>>>boards. Older EPIA M 10M boards do not have the problem. lspci -vv fro=
m
>>>old and new boards shows one difference that might be interesting,
>>>the Status 66MHz- changes to 66MHz+. What does that status mean?
>>>
>>> 01:00.0 VGA compatible controller: VIA Technologies, Inc.
>>>     =20
>>>
>>VT8623 [Apollo
>>   =20
>>
>>>CLE266] integrated CastleRock graphics (rev 03) (prog-if 00 [VGA])
>>>        Subsystem: VIA Technologies, Inc. VT8623 [Apollo CLE266]
>>>integrated
>>>CastleRock graphics
>>>        Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop-
>>>ParErr-
>>>Stepping- SERR- FastB2B-
>>>-       Status: Cap+ 66Mhz- UDF- FastB2B- ParErr- DEVSEL=3Dmedium >TAb=
ort-
>>><TAbort- <MAbort- >SERR- <PERR-
>>>+       Status: Cap+ 66Mhz+ UDF- FastB2B- ParErr- DEVSEL=3Dmedium >TAb=
ort-
>>><TAbort- <MAbort- >SERR- <PERR-
>>>        Latency: 32 (500ns min)
>>>        Interrupt: pin A routed to IRQ 11
>>>-       Region 0: Memory at e4000000 (32-bit, prefetchable) [size=3D64=
M]
>>>-       Region 1: Memory at e8000000 (32-bit, non-prefetchable)
>>>     =20
>>>
>>[size=3D16M]
>>   =20
>>
>>>+       Region 0: Memory at d8000000 (32-bit, prefetchable) [size=3D64=
M]
>>>+       Region 1: Memory at dc000000 (32-bit, non-prefetchable)
>>>     =20
>>>
>>[size=3D16M]
>>   =20
>>
>>>        Expansion ROM at <unassigned> [disabled] [size=3D64K]
>>>        Capabilities: [60] Power Management version 2
>>>                Flags: PMEClk- DSI+ D1+ D2+ AuxCurrent=3D0mA
>>>PME(D0-,D1-,D2-,D3hot-,D3cold-)
>>>
>>>Does anyone have any idea what code is at 0x40205cc1 and why its hung?
>>>How do I get symbols for the code that I assume XFree86 has loaded int=
o
>>>memory?
>>>
>>>Barry
>>>
>>>
>>>
>>>
>>>-------------------------------------------------------
>>>This SF.Net email is sponsored by: YOU BE THE JUDGE. Be one of 170
>>>Project Admins to receive an Apple iPod Mini FREE for your judgement o=
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>>>who ports your project to Linux PPC the best. Sponsored by IBM.
>>>Deadline: Sept. 24. Go here: http://sf.net/ppc_contest.php
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>>>     =20
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>>
>>-------------------------------------------------------
>>This SF.Net email is sponsored by: YOU BE THE JUDGE. Be one of 170
>>Project Admins to receive an Apple iPod Mini FREE for your judgement on
>>who ports your project to Linux PPC the best. Sponsored by IBM.
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>>_______________________________________________
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>
> =20
>

RE: [Unichrome-users] X server hangs using 100% CPU on MII andnewer M10K boards

From: Barry Scott <barry.scott@on...> - 2004-09-27 11:17

Thomas,

Here is the top of the stack when the hang occurs:

 via_drv base address: 0x0849ff80
0x084b2f14 -> viaWaitHQVFlip + 0x00000014
0x084b257d -> VIAVidDestroySurface + 0x000010ad
0x084b2c24 -> VIAVidUpdateOverlay + 0x00000344
0x084afca7 -> viaPutImageG + 0x00000277

Your guess that its the HQV Flip is confirmed. I'm about to retest with the
HQV init patch enabled.
Defining XV_DEBUG in via_video.h and via_swov.h would give you a much more
verbose log.

> If the hang occurs in the middle of playing it seems like the wait for the
HQV engine to flip
> an image is what's stuck. That would, on the other hand, seem to indicate
a hardware bug.

If you mean by hardware bug that its a bug in the silicon that the driver
needs to work around
then I agree. I have a lot of EPIA boards to test on and all CLE266 CD/CE
hang this way so
its not broken hardware.

> One thing to try would be a timeout in the flip wait. A typical HQV flip
of a DVD image makes the engine busy
> 15-17 ms on the CLE266.

How often does this flip occur? It cannot be every frame as the CPU load
is not high enough for 15ms to be true.

> If this is not the cause one would have to delve into the via_swov.c
code.
> One major difference between the revisions is that for earlier CLE266
chips the HQVInitpatch is enabled in the > > beginning of  the via_swov.c
file. That is not the case for later revisions. You might try to enable that
one and > see if there is a
> difference.

Barry

RE: [Unichrome-users] X server hangs using 100% CPU on MII andnewer M10K boards

From: Barry Scott <barry.scott@on...> - 2004-09-27 12:19

Including the init patch does not work. I cannot play any video at all.

The timeout option is only helping to detect that the driver is in
this error state. What should be done on detection of the flip failure?

Maybe the driver has called viaWaitHQVFlip in the wrong state and
thats the problem?

Barry


> -----Original Message-----
> From: unichrome-users-admin@...
> [mailto:unichrome-users-admin@... Behalf Of Barry
> Scott
> Sent: 27 September 2004 12:17
> To: Thomas Hellstrom
> Cc: unichrome-users@...
> Subject: RE: [Unichrome-users] X server hangs using 100% CPU on MII
> andnewer M10K boards
>
>
> Thomas,
>
> Here is the top of the stack when the hang occurs:
>
>  via_drv base address: 0x0849ff80
> 0x084b2f14 -> viaWaitHQVFlip + 0x00000014
> 0x084b257d -> VIAVidDestroySurface + 0x000010ad
> 0x084b2c24 -> VIAVidUpdateOverlay + 0x00000344
> 0x084afca7 -> viaPutImageG + 0x00000277
>
> Your guess that its the HQV Flip is confirmed. I'm about to
> retest with the
> HQV init patch enabled.
> Defining XV_DEBUG in via_video.h and via_swov.h would give you a much more
> verbose log.
>
> > If the hang occurs in the middle of playing it seems like the
> wait for the
> HQV engine to flip
> > an image is what's stuck. That would, on the other hand, seem
> to indicate
> a hardware bug.
>
> If you mean by hardware bug that its a bug in the silicon that the driver
> needs to work around
> then I agree. I have a lot of EPIA boards to test on and all CLE266 CD/CE
> hang this way so
> its not broken hardware.
>
> > One thing to try would be a timeout in the flip wait. A typical HQV flip
> of a DVD image makes the engine busy
> > 15-17 ms on the CLE266.
>
> How often does this flip occur? It cannot be every frame as the CPU load
> is not high enough for 15ms to be true.
>
> > If this is not the cause one would have to delve into the via_swov.c
> code.
> > One major difference between the revisions is that for earlier CLE266
> chips the HQVInitpatch is enabled in the > > beginning of  the via_swov.c
> file. That is not the case for later revisions. You might try to
> enable that
> one and > see if there is a
> > difference.
>
> Barry
>
>
>
> -------------------------------------------------------
> This SF.Net email is sponsored by: YOU BE THE JUDGE. Be one of 170
> Project Admins to receive an Apple iPod Mini FREE for your judgement on
> who ports your project to Linux PPC the best. Sponsored by IBM.
> Deadline: Sept. 24. Go here: http://sf.net/ppc_contest.php
> _______________________________________________
> Unichrome-users mailing list
> Unichrome-users@...
> https://lists.sourceforge.net/lists/listinfo/unichrome-users
>
>

RE: [Unichrome-users] X server hangs using 100% CPU on MII andnewer M10K boards

From: Barry Scott <barry.scott@on...> - 2004-09-28 09:38

reposted without logs.

Thomas,

I repeated the hang with the XV_DEBUG turned on.

Here is the head and tail of the log, stack trace and the patches I've
applied
(The timeout did not fire I guess because the usleep(1) takes a lot longer
then 1us).

Barry

addr: 0x084af110 offset 0x0000ee60
via_drv base address: 0x084a02b0
#0  0x400f9fe5 in nanosleep () from /lib/i686/libc.so.6
#1  0x40123a6c in usleep () from /lib/i686/libc.so.6
#2  0x084b4b83 in ? viaWaitHQVFlip + 0x00000042
#3  0x084b3d8f in ? Upd_Video + 0x000019bd
#4  0x084b4a17 in ? VIAVidUpdateOverlay + 0x000008a2
#5  0x084b0457 in ? viaPutImageG + 0x00000357
#6  0x080ac7a6 in xf86XVPutImage ()
#7  0x08286f55 in ?? ()
#8  0x082b0662 in ?? ()
#9  0x080b7364 in Dispatch ()
#10 0x080c8bf7 in main ()
#11 0x40064c57 in __libc_start_main () from /lib/i686/libc.so.6


--- programs/Xserver/hw/xfree86/drivers/via/via_regrec.c.orig	2004-09-27
15:08:01.000000000 +0100
+++ programs/Xserver/hw/xfree86/drivers/via/via_regrec.c	2004-09-27
15:10:25.000000000 +0100
@@ -47,9 +47,19 @@

 void viaWaitHQVFlip(VIAPtr pVia)
 {
+    int timeout_count = 1000000;
     CARD32 volatile *pdwState = (CARD32 volatile *) pVia->VidMapBase;
     pdwState = (CARD32 volatile *) (pVia->VidMapBase+HQV_CONTROL);
-    while (!(*pdwState & HQV_FLIP_STATUS) );
+    while (!(*pdwState & HQV_FLIP_STATUS) )
+    {
+        usleep(1);
+        timeout_count--;
+        if( timeout_count <= 0 )
+        {
+            ErrorF("viaWaitHQVFlip : timeout\n")
+            break;
+        }
+    }
 /*
     while (!((*pdwState & 0xc0)== 0xc0) );
     while (!((*pdwState & 0xc0)!= 0xc0) );

--- programs/Xserver/hw/xfree86/drivers/via/via_swov.c.orig	2004-09-27
15:06:32.000000000 +0100
+++ programs/Xserver/hw/xfree86/drivers/via/via_swov.c	2004-09-27
15:07:42.000000000 +0100
@@ -1427,7 +1427,7 @@
                     VIDOutD(V3_CONTROL, dwVidCtl);
                     VIDOutD(V_COMPOSE_MODE, (dwCompose|V3_COMMAND_FIRE ));
                 }
-		DBG_DD(ErrorF(" Done flips"));
+		DBG_DD(ErrorF(" Done flips\n"));
             }
             else
             {
@@ -1497,7 +1497,7 @@
         if ( hwDiff->dwHQVDisablePatch )     /*CLE_C0*/
 	     ViaSeqChange(hwp, 0x2E, 0x10, 0x10);
     }
-    DBG_DD(ErrorF(" Done Upd_Video"));
+    DBG_DD(ErrorF(" Done Upd_Video\n"));

     return PI_OK;

--- programs/Xserver/hw/xfree86/drivers/via/via_swov.h.orig	2004-09-27
13:17:26.000000000 +0100
+++ programs/Xserver/hw/xfree86/drivers/via/via_swov.h	2004-09-27
13:17:26.000000000 +0100
@@ -26,7 +26,7 @@
 #ifndef _VIA_SWOV_H_
 #define _VIA_SWOV_H_ 1

-/*#define   XV_DEBUG      1*/     /* write log msg to
/var/log/XFree86.0.log */
+#define   XV_DEBUG      1     /* write log msg to /var/log/XFree86.0.log */

 #ifdef XV_DEBUG
 # define DBG_DD(x) (x)

--- programs/Xserver/hw/xfree86/drivers/via/via_video.c.orig	2004-09-27
13:17:26.000000000 +0100
+++ programs/Xserver/hw/xfree86/drivers/via/via_video.c	2004-09-27
13:17:26.000000000 +0100
@@ -438,7 +438,7 @@
     XF86VideoAdaptorPtr newAdaptor = NULL;
     int num_adaptors;

-    DBG_DD(ErrorF(" via_video.c : viaInitVideo : \n"));
+    ErrorF(" via_video.c : viaInitVideo : 0x%8.8x\n", (unsigned int)((void
*)viaInitVideo) );

     if (!viaFastVidCpy)
 	viaFastVidCpy = viaVidCopyInit("video", pScreen);

Re: [Unichrome-users] X server hangs using 100% CPU on MII andnewer M10K boards

From: <unichrome@sh...> - 2004-09-30 07:12

Attachments: Message as HTML

Hi, Barry

Barry Scott wrote:

>Thomas,
>
>Here is the top of the stack when the hang occurs:
>
> via_drv base address: 0x0849ff80
>0x084b2f14 -> viaWaitHQVFlip + 0x00000014
>0x084b257d -> VIAVidDestroySurface + 0x000010ad
>0x084b2c24 -> VIAVidUpdateOverlay + 0x00000344
>0x084afca7 -> viaPutImageG + 0x00000277
>
>Your guess that its the HQV Flip is confirmed. I'm about to retest with the
>HQV init patch enabled.
>
>  
>
>If you mean by hardware bug that its a bug in the silicon that the driver
>needs to work around
>then I agree. I have a lot of EPIA boards to test on and all CLE266 CD/CE
>hang this way so
>its not broken hardware.
>
>  
>
Yes, this was what I meant. We need to come up with a workaround for this.

>>One thing to try would be a timeout in the flip wait. A typical HQV flip
>>    
>>
>of a DVD image makes the engine busy
>  
>
>>15-17 ms on the CLE266.
>>    
>>
>
>How often does this flip occur? It cannot be every frame as the CPU load
>is not high enough for 15ms to be true.
>
>  
>
Yes, it occurs every frame, but in another codepath in via_video.c 
Flip(), usually
the driver doesn't wait for the flip to complete, but rather checks that 
the previous
flip has completed before proceeding.

>>If this is not the cause one would have to delve into the via_swov.c
>>    
>>
>code.
>  
>
>>One major difference between the revisions is that for earlier CLE266
>>    
>>
>chips the HQVInitpatch is enabled in the > > beginning of  the via_swov.c
>file. That is not the case for later revisions. You might try to enable that
>one and > see if there is a
>  
>
>>difference.
>>    
>>
>
>  
>
It seems like the hang occurs when a surface is destroyed. Exactly what 
does your player
do when the hang occurs? Has it been playing successfully just before? 
Changing frame format?
Anything like that? Maybe it's possible to dig up some clues from VIA's 
latest drivers.

>Barry
>
>  
>
/Thomas

Re: [Unichrome-users] X server hangs using 100% CPU on MII andnewer M10K boards

From: Ivor Hewitt <ivor@iv...> - 2004-09-30 08:11

>> Thomas,
>>
>> Here is the top of the stack when the hang occurs:
>>
>> via_drv base address: 0x0849ff80
>> 0x084b2f14 -> viaWaitHQVFlip + 0x00000014
>> 0x084b257d -> VIAVidDestroySurface + 0x000010ad
>> 0x084b2c24 -> VIAVidUpdateOverlay + 0x00000344
>> 0x084afca7 -> viaPutImageG + 0x00000277
>>
>> Your guess that its the HQV Flip is confirmed. I'm about to retest 
>> with the
>> HQV init patch enabled.
>>
>>  
>
Barry,
Is there a chance that your player has sent an incomplete slice set to 
the decoder before the hang?
Can you add some logging to the slice code to see what's being uploaded?
Ivor.

RE: [Unichrome-users] X server hangs using 100% CPU on MII andnewer M10K boards

From: Barry Scott <barry.scott@on...> - 2004-09-30 09:02

>  It seems like the hang occurs when a surface is destroyed. Exactly what
does your player
 >  do when the hang occurs? Has it been playing successfully just before?
Changing frame format?
 >  Anything like that? Maybe it's possible to dig up some clues from VIA's
latest drivers.

I'm using Xine lib and a custom front end to play mpeg2 movies in a loop the
moveies are
short 30 to 60 seconds long. In another window mozilla is playing flash and
HTML pages.

The hang seems to happen at the end of a movie and when flash is playing in
mozilla.
I'll try and reduce the complexity of the test. You have made me think it
may be
triggered by one particular piece of media. I'll try to simplify so that you
could
reproduce the problem.

Barry

RE: [Unichrome-users] X server hangs using 100% CPU on MII andnewer M10K boards

From: Barry Scott <barry.scott@on...> - 2004-09-30 09:10

>
> Barry,
> Is there a chance that your player has sent an incomplete slice set to 
> the decoder before the hang?
> Can you add some logging to the slice code to see what's being uploaded?
> Ivor.

What is a "slice"?

I'm using xinelib rc5. How do I get xine to log what you want?

I'm not using the XVMC plugin, I assume that xine is sending whole
frames to be played.

Barry

RE: [Unichrome-users] X server hangs using 100% CPU on MII andnewer M10K boards

From: Barry Scott <barry.scott@on...> - 2004-09-30 09:10

Where are the latest via drivers you talk about, are they the binary ones?

Barry

RE: [Unichrome-users] X server hangs using 100% CPU on MII andnewer M10K boards

From: Thomas <unichrome@sh...> - 2004-09-30 09:51

Hi, Barry.


> I'll try and reduce the complexity of the test. You have made me think =
it
> may be
> triggered by one particular piece of media. I'll try to simplify so tha=
t
> you
> could
> reproduce the problem.
>

There's really no point since I don't have the hardware.
What I can do is to give you some hints to what to do and see if that
fixes the problem. I can also check your log and see if the HQV is fed an=
y
invalid data.

What happens in your particular case is that the driver turns off the
video overlay, switches to a new one and hangs while trying to initialize=
,
because the hardware does not respond.

The VIA drivers are the ones at their site. We have some source in our
CVS, module "via", but I didn't see anything particular there....

Two new possible remedies.

1. Try to alter the "hqvdisablepatch" behaviour as well. It may well be
that VIA has fixed a previous hw bug in these new chipsets.

2. Could you try the following patch and see if it might help. It sort of
retries the flip if the HQV does not respond.

--- via_swov.c  11 Sep 2004 10:29:26 -0000      1.14
+++ via_swov.c  30 Sep 2004 09:35:24 -0000
@@ -1398,11 +1398,16 @@
                 }
                 else    /* CLE_C0 */
                 {
+                 do {
                     VIDOutD(HQV_CONTROL, dwHQVCtl & ~HQV_SW_FLIP);
-                    VIDOutD(HQV_CONTROL, dwHQVCtl | HQV_SW_FLIP);
+                    VIDOutD(HQV_CONTROL, dwHQVCtl | HQV_SW_FLIP |
0x00000001);
+                   usleep(20000);
+                 } while (!(VIDInD(HQV_CONTROL) & 0x00000001));
+                 /*
                    DBG_DD(ErrorF(" Wait flips5"));
                     viaWaitHQVFlip(pVia);
                    DBG_DD(ErrorF(" Wait flips6"));
+                 */
                 }



> Barry
>
>
>
> -------------------------------------------------------
> This SF.net email is sponsored by: IT Product Guide on ITManagersJourna=
l
> Use IT products in your business? Tell us what you think of them. Give =
us
> Your Opinions, Get Free ThinkGeek Gift Certificates! Click to find out
> more
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> _______________________________________________
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> https://lists.sourceforge.net/lists/listinfo/unichrome-users
>

Re: [Unichrome-users] X server hangs using 100% CPU on MII andnewer M10K boards

From: Ivor Hewitt <ivor@iv...> - 2004-09-30 09:54

Barry Scott wrote:

>>Barry,
>>Is there a chance that your player has sent an incomplete slice set to 
>>the decoder before the hang?
>>Can you add some logging to the slice code to see what's being uploaded?
>>Ivor.
>>    
>>
>
>What is a "slice"?
>
>I'm using xinelib rc5. How do I get xine to log what you want?
>
>I'm not using the XVMC plugin, I assume that xine is sending whole
>frames to be played.
>
>Barry
>  
>
Oh yes you're not using hardware mpeg decoding at all - I forgot - the 
problem reminded me of a different issue.

This hang is happening purely using stock xine-lib and software 
decoding. Hmmm. Weird, I thought the waitHQVFlip only got called from 
the UpdateVideo call I don't quite understand why there's 
VIAVidDestroySurface on the stack above the flip. Could be optimiser 
reorganising/inlining I guess. Is it possible for you to compile the 
driver up with debug symbols and get a backtrace with codelines?

Ivor.

Re: [Unichrome-users] X server hangs using 100% CPU on MII andnewer M10K boards

From: Ivor Hewitt <ivor@iv...> - 2004-09-30 09:59

Ivor Hewitt wrote:

> Barry Scott wrote:
>
>>> Barry,
>>> Is there a chance that your player has sent an incomplete slice set 
>>> to the decoder before the hang?
>>> Can you add some logging to the slice code to see what's being 
>>> uploaded?
>>> Ivor.
>>>   
>>
>>
>> What is a "slice"?
>>
>> I'm using xinelib rc5. How do I get xine to log what you want?
>>
>> I'm not using the XVMC plugin, I assume that xine is sending whole
>> frames to be played.
>>
>> Barry
>>  
>>
> Oh yes you're not using hardware mpeg decoding at all - I forgot - the 
> problem reminded me of a different issue.
>
> This hang is happening purely using stock xine-lib and software 
> decoding. Hmmm. Weird, I thought the waitHQVFlip only got called from 
> the UpdateVideo call I don't quite understand why there's 
> VIAVidDestroySurface on the stack above the flip. Could be optimiser 
> reorganising/inlining I guess. Is it possible for you to compile the 
> driver up with debug symbols and get a backtrace with codelines?
>
> Ivor.
>
>
Ignore that. I've caught up. :-)

RE: [Unichrome-users] X server hangs using 100% CPU on MII andnewer M10K boards

From: Barry Scott <barry.scott@on...> - 2004-09-30 10:26

> reorganising/inlining I guess. Is it possible for you to compile the 
> driver up with debug symbols and get a backtrace with codelines?

The short answer is no. The long answer is that you have to create
a custom gdb to be able to debug the Xserver. And the patch I saw was
for 6.0 gdb and I have gdb 5.3. The module loading code uses home brew
XFree86 code not the usual ld.so stuff. I've found building gdb is not
a task for the faint hearted.

What I did was have the via driver print out the address of the via init
routine and then used a python program to convert the bt into symbols
using the output of nm to give me the symbols.

Barry

RE: [Unichrome-users] X server hangs using 100% CPU on MII andnewer M10K boards

From: Barry Scott <barry.scott@on...> - 2004-09-30 13:13

The patch has not cured the problem. It may be taking longer to go wrong,
I'll know tomorrow for sure. Normally I see about 28 hangs every 24 hours.

> 1. Try to alter the "hqvdisablepatch" behaviour as well. It may well be
> that VIA has fixed a previous hw bug in these new chipsets.

What did you have in mind here?

Barry

Re: [Unichrome-users] X server hangs using 100% CPU on MII andnewer M10K boards

From: Ivor Hewitt <ivor@iv...> - 2004-09-30 13:16

Barry Scott wrote:

>The patch has not cured the problem. It may be taking longer to go wrong,
>I'll know tomorrow for sure. Normally I see about 28 hangs every 24 hours.
>
>  
>
>>1. Try to alter the "hqvdisablepatch" behaviour as well. It may well be
>>that VIA has fixed a previous hw bug in these new chipsets.
>>    
>>
>
>  
>
I'll take a look through the CLEX47 binary tonight.

Re: [Unichrome-users] X server hangs using 100% CPU on MII andnewer M10K boards

From: Luc Verhaegen <libv@sk...> - 2004-09-30 13:46

On Thu, Sep 30, 2004 at 02:16:29PM +0100, Ivor Hewitt wrote:
> Barry Scott wrote:
> 
> >The patch has not cured the problem. It may be taking longer to go 
> >wrong,
> >I'll know tomorrow for sure. Normally I see about 28 hangs every 24 
> >hours.
> >
> I'll take a look through the CLEX47 binary tonight.
> 
CLEXF40047 is in our cvs under the via1 module.

Luc Verhaegen.

RE: [Unichrome-users] X server hangs using 100% CPU on MII andnewer M10K boards

From: Thomas <unichrome@sh...> - 2004-09-30 13:46

Hi, Barry.

> The patch has not cured the problem. It may be taking longer to go wron=
g,
> I'll know tomorrow for sure. Normally I see about 28 hangs every 24 hou=
rs.
>
>> 1. Try to alter the "hqvdisablepatch" behaviour as well. It may well b=
e
>> that VIA has fixed a previous hw bug in these new chipsets.
>
> What did you have in mind here?

Try to disable the "HQVDisablePatch" for CLE CX in via_swov.c. It's
enabled by default for this hardware.

Otherwise this is probably a dead end without input from VIA. I'm not sur=
e
whether this is an option for you, but if you try and install VIA's lates=
t
binary drivers and see if the problem persists, this should go to VIA as =
a
hardware bug. Since they are the only ones to know how the firmware
works, they are the only ones likely to come up with a solution. I don't
know how many hours I've spent trying to make the MPEG interrupt work
until I got the word from VIA that it just didn't.

I'll check the register values fed to the HQV just before hang, though.
They are in your log.

Since, as I understand it, you're a commercial user, VIA would probably b=
e
more responsive than they usually are. Also, a normal user that didn't
stress the HQV in this way, would probably just ignore an occasional
lockup so it is possible that VIA just doesn't know about it, and it is
also possible that there is no simple workaround.

Regards,
Thomas


>
> Barry
>
>
>
> -------------------------------------------------------
> This SF.net email is sponsored by: IT Product Guide on ITManagersJourna=
l
> Use IT products in your business? Tell us what you think of them. Give =
us
> Your Opinions, Get Free ThinkGeek Gift Certificates! Click to find out
> more
> http://productguide.itmanagersjournal.com/guidepromo.tmpl
> _______________________________________________
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> https://lists.sourceforge.net/lists/listinfo/unichrome-users
>

Re: [Unichrome-users] X server hangs using 100% CPU on MII andnewer M10K boards

From: Ivor Hewitt <ivor@iv...> - 2004-09-30 14:11

Luc Verhaegen wrote:

>On Thu, Sep 30, 2004 at 02:16:29PM +0100, Ivor Hewitt wrote:
>  
>
>>Barry Scott wrote:
>>
>>    
>>
>>>The patch has not cured the problem. It may be taking longer to go 
>>>wrong,
>>>I'll know tomorrow for sure. Normally I see about 28 hangs every 24 
>>>hours.
>>>
>>>      
>>>
>>I'll take a look through the CLEX47 binary tonight.
>>
>>    
>>
>CLEXF40047 is in our cvs under the via1 module.
>
>Luc Verhaegen.
>  
>
I guess that will be easier then! :-)

Re: [Unichrome-users] X server hangs using 100% CPU on MII andnewer M10K boards

From: Ivor Hewitt <ivor@iv...> - 2004-09-30 14:38

Thomas Hellstr=F6m wrote:

>Hi, Barry.
>
> =20
>
>>The patch has not cured the problem. It may be taking longer to go wron=
g,
>>I'll know tomorrow for sure. Normally I see about 28 hangs every 24 hou=
rs.
>>
>>   =20
>>
>>>1. Try to alter the "hqvdisablepatch" behaviour as well. It may well b=
e
>>>that VIA has fixed a previous hw bug in these new chipsets.
>>>     =20
>>>
>>What did you have in mind here?
>>   =20
>>
>
>Try to disable the "HQVDisablePatch" for CLE CX in via_swov.c. It's
>enabled by default for this hardware.
>
>Otherwise this is probably a dead end without input from VIA. I'm not su=
re
>whether this is an option for you, but if you try and install VIA's late=
st
>binary drivers and see if the problem persists, this should go to VIA as=
 a
>hardware bug. Since they are the only ones to know how the firmware
>works, they are the only ones likely to come up with a solution. I don't
>know how many hours I've spent trying to make the MPEG interrupt work
>until I got the word from VIA that it just didn't.
>
> =20
>
OK the 47 drivers have different code for the WaitHQVFlip.
 else    /* CLE_C0 */
                {
                    VIDOutD( HQV_CONTROL, dwHQVCtl & ~HQV_SW_FLIP);
                    VIDOutD( HQV_CONTROL, dwHQVCtl | HQV_SW_FLIP);
                    /* VIDOutD( HQV_CONTROL, dwHQVCtl | HQV_SUB_FLIP); */
                    /* WaitHQVFlip(pjVideo); */
                    UniversalWait(pjVideo, HQV_CONTROL, HQV_FLIP_STATUS, =
1);
                }

and universal wait does:-

static __inline void UniversalWait(unsigned char* pjVideo, unsigned long=20
dwReg, unsigned long dwFlags, Bool WaitBitSet)
{
    unsigned long volatile *pdwState =3D (unsigned long volatile *)=20
(pjVideo+dwReg);

    if (WaitBitSet)
    {
        while (!(*pdwState & dwFlags) );
    }
    else
    {
        while ((*pdwState & dwFlags) );
    }
}

Re: [Unichrome-users] X server hangs using 100% CPU on MII andnewer M10K boards

From: Ivor Hewitt <ivor@iv...> - 2004-09-30 14:42

Ivor Hewitt wrote:

> Thomas Hellstr=F6m wrote:
>
>> Hi, Barry.
>>
>> =20
>>
>>> The patch has not cured the problem. It may be taking longer to go=20
>>> wrong,
>>> I'll know tomorrow for sure. Normally I see about 28 hangs every 24=20
>>> hours.
>>>
>>>  =20
>>>
>>>> 1. Try to alter the "hqvdisablepatch" behaviour as well. It may=20
>>>> well be
>>>> that VIA has fixed a previous hw bug in these new chipsets.
>>>>    =20
>>>
>>> What did you have in mind here?
>>>  =20
>>
>>
>> Try to disable the "HQVDisablePatch" for CLE CX in via_swov.c. It's
>> enabled by default for this hardware.
>>
>> Otherwise this is probably a dead end without input from VIA. I'm not=20
>> sure
>> whether this is an option for you, but if you try and install VIA's=20
>> latest
>> binary drivers and see if the problem persists, this should go to VIA=20
>> as a
>> hardware bug. Since they are the only ones to know how the firmware
>> works, they are the only ones likely to come up with a solution. I don=
't
>> know how many hours I've spent trying to make the MPEG interrupt work
>> until I got the word from VIA that it just didn't.
>>
>> =20
>>
> OK the 47 drivers have different code for the WaitHQVFlip.
> else    /* CLE_C0 */
>                {
>                    VIDOutD( HQV_CONTROL, dwHQVCtl & ~HQV_SW_FLIP);
>                    VIDOutD( HQV_CONTROL, dwHQVCtl | HQV_SW_FLIP);
>                    /* VIDOutD( HQV_CONTROL, dwHQVCtl | HQV_SUB_FLIP); *=
/
>                    /* WaitHQVFlip(pjVideo); */
>                    UniversalWait(pjVideo, HQV_CONTROL,=20
> HQV_FLIP_STATUS, 1);
>                }
>
> and universal wait does:-
>
> static __inline void UniversalWait(unsigned char* pjVideo, unsigned=20
> long dwReg, unsigned long dwFlags, Bool WaitBitSet)
> {
>    unsigned long volatile *pdwState =3D (unsigned long volatile *)=20
> (pjVideo+dwReg);
>
>    if (WaitBitSet)
>    {
>        while (!(*pdwState & dwFlags) );
>    }
>    else
>    {
>        while ((*pdwState & dwFlags) );
>    }
> }
>
Which does exactly the same.
Hmm what a pointless change.

Re: [Unichrome-users] X server hangs using 100% CPU on MII andnewer M10K boards

From: Luc Verhaegen <libv@sk...> - 2004-09-30 15:03

On Thu, Sep 30, 2004 at 03:42:24PM +0100, Ivor Hewitt wrote:
> Ivor Hewitt wrote:
> 
> >OK the 47 drivers have different code for the WaitHQVFlip.
> >else    /* CLE_C0 */
> >               {
> >                   VIDOutD( HQV_CONTROL, dwHQVCtl & ~HQV_SW_FLIP);
> >                   VIDOutD( HQV_CONTROL, dwHQVCtl | HQV_SW_FLIP);
> >                   /* VIDOutD( HQV_CONTROL, dwHQVCtl | HQV_SUB_FLIP); 
> >                   */
> >                   /* WaitHQVFlip(pjVideo); */
> >                   UniversalWait(pjVideo, HQV_CONTROL, 
> >HQV_FLIP_STATUS, 1);
> >               }
> >
> >and universal wait does:-
> >
> >static __inline void UniversalWait(unsigned char* pjVideo, unsigned 
> >long dwReg, unsigned long dwFlags, Bool WaitBitSet)
> >{
> >   unsigned long volatile *pdwState = (unsigned long volatile *) 
> >(pjVideo+dwReg);
> >
> >   if (WaitBitSet)
> >   {
> >       while (!(*pdwState & dwFlags) );
> >   }
> >   else
> >   {
> >       while ((*pdwState & dwFlags) );
> >   }
> >}
> >
> Which does exactly the same.
> Hmm what a pointless change.
> 
If you browse through CLEX 3something through 47 you will also see a 
lot of 

if () {

} else {

}

moved to

if ()
{

}
else
{

}

My guess is that someone's superior said that that someone should 
"clean up" the driver. In this light, that change of yours is quite 
imaginative ;)

These changes make the diffs very dense. When importing i was going 
to seperate real changes and those changes. Would've been quite a 
different view then, but i'd probably also be doing some damage to 
the code as it exists.

Luc Verhaegen.

RE: [Unichrome-users] X server hangs using 100% CPU on MII andnewer M10K boards

From: Barry Scott <barry.scott@on...> - 2004-09-30 16:50

> Hi, Barry.
>
> > The patch has not cured the problem. It may be taking longer to
> go wrong,
> > I'll know tomorrow for sure. Normally I see about 28 hangs
> every 24 hours.
> >
> >> 1. Try to alter the "hqvdisablepatch" behaviour as well. It may well be
> >> that VIA has fixed a previous hw bug in these new chipsets.
> >
> > What did you have in mind here?
>
> Try to disable the "HQVDisablePatch" for CLE CX in via_swov.c. It's
> enabled by default for this hardware.

Done. I have video with disablepatch FALSE. I'll leave running over night
and report the outcome tomorrow.

Barry

RE: [Unichrome-users] X server hangs using 100% CPU on MII andnewer M10K boards

From: Barry Scott <barry.scott@on...> - 2004-10-01 09:34

> >> 1. Try to alter the "hqvdisablepatch" behaviour as well. It may well be
> >> that VIA has fixed a previous hw bug in these new chipsets.
> >
> > What did you have in mind here?
>
> Try to disable the "HQVDisablePatch" for CLE CX in via_swov.c. It's
> enabled by default for this hardware.

Turning off the disable patch improves the average up time for aroun 50m
to 1h 30m.

You patch also improves matters. I'll add you patch back in with the disable
disabled and retest

> Otherwise this is probably a dead end without input from VIA. I'm not sure
> whether this is an option for you, but if you try and install VIA's latest
> binary drivers and see if the problem persists, this should go to VIA as a
> hardware bug. Since they are the only ones to know how the firmware
> works, they are the only ones likely to come up with a solution. I don't
> know how many hours I've spent trying to make the MPEG interrupt work
> until I got the word from VIA that it just didn't.
>
> I'll check the register values fed to the HQV just before hang, though.
> They are in your log.

Did you find anything interesting?

Do you think turning off triple HQV feature might help? Isn't the change
from old to new also a change from 2 HQV buffer to 3 HQV buffers?

> Since, as I understand it, you're a commercial user, VIA would probably be
> more responsive than they usually are. Also, a normal user that didn't
> stress the HQV in this way, would probably just ignore an occasional
> lockup so it is possible that VIA just doesn't know about it, and it is
> also possible that there is no simple workaround.

Yes, I think you are right its only because of the stess that this is
breaking. And may almost never slow when play a few long mpegs.
I'm in contact with VIA but its slow going.

Barry

RE: [Unichrome-users] X server hangs using 100% CPU on MII andnewer M10K boards

From: Barry Scott <barry.scott@on...> - 2004-10-05 10:11

I tried using the VIA 40047 code on top of 4.4.0 and that
does not hang, but it does stop displaying the video after
a few minutes and is replaced by a blue rectangle.

The logging shows that it is still Flipping frame by frame
and xine is still taking CPU time like it does when the
movie is visible.

Barry

RE: [Unichrome-users] X server hangs using 100% CPU on MII andnewer M10K boards

From: Barry Scott <barry.scott@on...> - 2004-10-06 09:21

Last night we ran for 16 hours without a problem playing

1) movies in an endless loop
2) text scroll in an endless loop
3) images in an endless loop

What fails is

1) movies in an endless loop
2) Flash in mozilla in an endless loop
3) text scroll in an endless loop
4) static image

We are working on the guess that its the interaction of
Flash with Movie playing. Are you aware of Flash trying to
access XVIDEO? Or doing anything else thats unusual?

Barry

RE: [Unichrome-users] X server hangs using 100% CPU on MII andnewer M10K boards

From: Thomas <unichrome@sh...> - 2004-10-06 09:40

Hi!

> Last night we ran for 16 hours without a problem playing
>
> 1) movies in an endless loop
> 2) text scroll in an endless loop
> 3) images in an endless loop
>
> What fails is
>
> 1) movies in an endless loop
> 2) Flash in mozilla in an endless loop
> 3) text scroll in an endless loop
> 4) static image
>
> We are working on the guess that its the interaction of
> Flash with Movie playing. Are you aware of Flash trying to
> access XVIDEO? Or doing anything else thats unusual?
>

No, I'm not sure how that works. Still if flash kicks in, displays an
image using Xv and the server hangs or displays a blue screen, something
is wrong with the driver / hardware.

Maybe I can come up with something that detects a timeout and then
switches off the HQV, then on again, and retries the flip.

What do you think?

/Thomas



> Barry
>
>

RE: [Unichrome-users] X server hangs using 100% CPU on MII andnewer M10K boards

From: Barry Scott <barry.scott@on...> - 2004-10-06 15:19

> Maybe I can come up with something that detects a timeout and then
> switches off the HQV, then on again, and retries the flip.
> 
> What do you think?

We are code inspecting the driver to look for a logic error.

Could you explain what the HQV_SW_FLIP and HQV_FLIP_STATUS
bits are for please? Here is our current guess.

HQV_FLIP_STATUS is written as a 1 to tell the chip of a HQV config
change? HQV_FLIP_STATUS is reads 0 while the chip works on
the change and reads as 1 when change has completed?

HQV_SW_FLIP reads as 1 to say can add another frame for output
reads as 0 when the HQV buffers are busy? HQV_SW_FLIP is written
as a 1 to tell the chip that another frames address is in the
HQV source data reqisters?

If the above guess is right the problem is that the chip is
commanded to change config but never acks the change.

Our next step will be to instrument all writes to HQV_CONTROL
and all reads (expect the ones in the wait loops).

I hope that we find a logic error and can avoid coding a timeout
and recover patch.

Barry

RE: [Unichrome-users] X server hangs using 100% CPU on MII andnewer M10K boards

From: Thomas <unichrome@sh...> - 2004-10-06 15:57

Hi, Barry.

>> Maybe I can come up with something that detects a timeout and then
>> switches off the HQV, then on again, and retries the flip.
>>
>> What do you think?
>
> We are code inspecting the driver to look for a logic error.
>
> Could you explain what the HQV_SW_FLIP and HQV_FLIP_STATUS
> bits are for please? Here is our current guess.
>
> HQV_FLIP_STATUS is written as a 1 to tell the chip of a HQV config
> change? HQV_FLIP_STATUS is reads 0 while the chip works on
> the change and reads as 1 when change has completed?
>
> HQV_SW_FLIP reads as 1 to say can add another frame for output
> reads as 0 when the HQV buffers are busy? HQV_SW_FLIP is written
> as a 1 to tell the chip that another frames address is in the
> HQV source data reqisters?
>
> If the above guess is right the problem is that the chip is
> commanded to change config but never acks the change.
>
> Our next step will be to instrument all writes to HQV_CONTROL
> and all reads (expect the ones in the wait loops).
>
> I hope that we find a logic error and can avoid coding a timeout
> and recover patch.
>
> Barry
>
>

Since I'm under NDA I cannot answer your questions directly, But I can
provide a code snippet, based on my own understanding of the docs.

/*
* This snippet is provided under GPL.
*
*/

control =3D HQV_SW_FLIP       /* Perform a flip from a software buffer */
         | HQV_FLIP_STATUS; /* Just clear the HQV_FLIP_STATUS bit for
subsequent reads */
VIDOUTD(HQV_CONTROL, control);

while (VIDIND(HQV_CONTROL) & HQV_SW_FLIP); /* Wait while HQV is performin=
g
the software flip */
while (VIDNID(HQV_CONTROL) & HQV_FLIP_STATUS); /* Wait 'til the HQV is
done outputting the image to the HQV output buffers */

Hope this helps.
Personally I believe that if it is not a hardware bug, then the HQV is fe=
d
some invalid information just before the flip.

/Thomas

Re: [Unichrome-users] X server hangs using 100% CPU on MII

From: Matt Jarvis <matt@ro...> - 2004-10-07 07:39

Hi

We appear to be having the same problem on our newest Epia M1000 boards, 
on the earlier boards it doesnt seem to happen. Our xine-lib based 
player will play fine for nine or ten hours, and then X will hang using 
100% cpu, with a green screen. Oddly it also only seems to happen on our 
single head machines ( using cle266 for video out ), the dual head 
version of our player ( using a pci graphics card as a control screen, 
and cle266 for video out ) doesnt seem to suffer from this problem. If 
you do manage to track this down, can you post to the list and let us 
know how to deal with it ? If there is anything we can do to help with 
testing etc then I'm more than happy to do it, this kind of driver work 
is a bit beyond our in-house coding skills I'm afraid.

Thanks

Matt

Thomas Hellström wrote:
> Hi, Barry.
> 
> 
>>>Maybe I can come up with something that detects a timeout and then
>>>switches off the HQV, then on again, and retries the flip.
>>>
>>>What do you think?
>>
>>We are code inspecting the driver to look for a logic error.
>>
>>Could you explain what the HQV_SW_FLIP and HQV_FLIP_STATUS
>>bits are for please? Here is our current guess.
>>
>>HQV_FLIP_STATUS is written as a 1 to tell the chip of a HQV config
>>change? HQV_FLIP_STATUS is reads 0 while the chip works on
>>the change and reads as 1 when change has completed?
>>
>>HQV_SW_FLIP reads as 1 to say can add another frame for output
>>reads as 0 when the HQV buffers are busy? HQV_SW_FLIP is written
>>as a 1 to tell the chip that another frames address is in the
>>HQV source data reqisters?
>>
>>If the above guess is right the problem is that the chip is
>>commanded to change config but never acks the change.
>>
>>Our next step will be to instrument all writes to HQV_CONTROL
>>and all reads (expect the ones in the wait loops).
>>
>>I hope that we find a logic error and can avoid coding a timeout
>>and recover patch.
>>
>>Barry
>>
>>
> 
> 
> Since I'm under NDA I cannot answer your questions directly, But I can
> provide a code snippet, based on my own understanding of the docs.
> 
> /*
> * This snippet is provided under GPL.
> *
> */
> 
> control = HQV_SW_FLIP       /* Perform a flip from a software buffer */
>          | HQV_FLIP_STATUS; /* Just clear the HQV_FLIP_STATUS bit for
> subsequent reads */
> VIDOUTD(HQV_CONTROL, control);
> 
> while (VIDIND(HQV_CONTROL) & HQV_SW_FLIP); /* Wait while HQV is performing
> the software flip */
> while (VIDNID(HQV_CONTROL) & HQV_FLIP_STATUS); /* Wait 'til the HQV is
> done outputting the image to the HQV output buffers */
> 
> Hope this helps.
> Personally I believe that if it is not a hardware bug, then the HQV is fed
> some invalid information just before the flip.
> 
> /Thomas
> 
> 
> 
> 
> 
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-- 
Matt Jarvis
Technical Development Manager
Rolec Music Ltd
210 Belgravia Works, Marlborough Road, London, UK N19 4NF
Tel: +44 207 281 4776 Fax : +44 207 281 4565
mailto: matt@...
web: http://www.rolecmusic.com

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RE: [Unichrome-users] X server hangs using 100% CPU on MII andnewer M10K boards

From: Barry Scott <barry.scott@on...> - 2004-10-12 12:15

We are testing a possible fix. Will let you know how the testing
goes.

Barry

RE: [Unichrome-users] X server hangs using 100% CPU on MII andnewer M10K boards

From: Thomas <unichrome@sh...> - 2004-10-12 13:10

> We are testing a possible fix. Will let you know how the testing
> goes.
>
> Barry
>
>

Hi, Barry!

Sounds very good.
Do you have any of the r18 boards that are reported to crash VIA's driver
when
using Xv, or are you using earler versions?

/Thomas

RE: [Unichrome-users] X server hangs using 100% CPU on MII andnewer M10K boards

From: Barry Scott <barry.scott@on...> - 2004-10-13 17:03

> Hi, Barry!
>
> Sounds very good.
> Do you have any of the r18 boards that are reported to crash VIA's driver
> when
> using Xv, or are you using earler versions?

I have R18 boards, all currently shipping M10000 boards have chipset
rev 18 with a BIOS vesion of 1.16. MII are shipping with chipset rev
17 that does not seem to have a problem.

I tried the VIA drivers on a 4.4.0 and they barely work for XV, but I did
not
crash them. I was told that they only support XFree86 4.3.

Barry