OProfile

Suravee Suthikulpanit wrote:
> 
> This patch enables the support (add new proccessor string and events/unitmask files)
> for AMD processor family12h, family14h, and family15h.
Suravee,
This patch looks fine to me.  An 'ack' from Robert Richter would be good, though.  Is the kernel support upstream for these processor families?  If not, what's the ETA?  Does 'make distcheck' succeed?  And, finally, the patch needs a "Signed-off-by" line.  Just reply-all to this note and paste it in.  Go ahead and check it in when ready.

Thanks.
-Maynard
> 
>  ChangeLog-family12-14-15           |   15 +++++++++++++++
>  events/Makefile.am                 |    3 +++
>  events/x86-64/family12h/events     |   23 +++++++++++++++++++++++
>  events/x86-64/family12h/unit_masks |   30 ++++++++++++++++++++++++++++++
>  events/x86-64/family14h/events     |   23 +++++++++++++++++++++++
>  events/x86-64/family14h/unit_masks |   30 ++++++++++++++++++++++++++++++
>  events/x86-64/family15h/events     |   16 ++++++++++++++++
>  events/x86-64/family15h/unit_masks |   16 ++++++++++++++++
>  libop/op_cpu_type.c                |    3 +++
>  libop/op_cpu_type.h                |    3 +++
>  libop/op_events.c                  |    3 +++
>  utils/ophelp.c                     |   12 ++++++++++++
>  12 files changed, 177 insertions(+)
> 
> ----
> diff -paurN oprofile/ChangeLog oprofile-new/ChangeLog-family12-14-15
> --- oprofile/ChangeLog	2010-11-07 15:28:36.112419594 -0600
> +++ oprofile-new/ChangeLog-family12-14-15	2010-11-07 16:17:29.031184728 -0600
> @@ -1,3 +1,18 @@
> +2010-11-7  Suravee Suthikulpanit <suravee.suthikulpanit@...>
> +
> +	* events/Makefile.am:
> +	* libop/op_events.c:
> +	* libop/op_cpu_type.h:
> +	* libop/op_cpu_type.c:
> +	* utils/ophelp.c:
> +	* events/x86-64/family12h/events: New File
> +	* events/x86-64/family12h/unit_masks: New File
> +	* events/x86-64/family14h/events: New File
> +	* events/x86-64/family14h/unit_masks: New File
> +	* events/x86-64/family15h/events: New File
> +	* events/x86-64/family15h/unit_masks: New File
> +	  Add support for new AMD processors (family12h/14h/15h)
> +
>  2010-10-15  Roland Grunberg  <roland.grunberg@...>
> 
>  	* libop/op_xml_events.c:
> diff -paurN oprofile/events/Makefile.am oprofile-new/events/Makefile.am
> --- oprofile/events/Makefile.am	2010-11-07 15:28:36.422353220 -0600
> +++ oprofile-new/events/Makefile.am	2010-11-05 17:30:42.640272475 -0500
> @@ -35,6 +35,9 @@ event_files = \
>  	x86-64/hammer/events x86-64/hammer/unit_masks \
>  	x86-64/family10/events x86-64/family10/unit_masks \
>  	x86-64/family11h/events x86-64/family11h/unit_masks \
> +	x86-64/family12h/events x86-64/family12h/unit_masks \
> +	x86-64/family14h/events x86-64/family14h/unit_masks \
> +	x86-64/family15h/events x86-64/family15h/unit_masks \
>  	arm/xscale1/events arm/xscale1/unit_masks \
>  	arm/xscale2/events arm/xscale2/unit_masks \
>  	arm/armv6/events arm/armv6/unit_masks \
> diff -paurN oprofile/libop/op_events.c oprofile-new/libop/op_events.c
> --- oprofile/libop/op_events.c	2010-11-07 15:28:36.272421729 -0600
> +++ oprofile-new/libop/op_events.c	2010-11-05 17:32:21.221347227 -0500
> @@ -972,6 +972,9 @@ void op_default_event(op_cpu cpu_type, s
>   		case CPU_CORE_I7:
>  		case CPU_NEHALEM:
>  		case CPU_MIPS_LOONGSON2:
> +		case CPU_FAMILY12H:
> +		case CPU_FAMILY14H:
> +		case CPU_FAMILY15H:
>  			descr->name = "CPU_CLK_UNHALTED";
>  			break;
> 
> diff -paurN oprofile/libop/op_cpu_type.h oprofile-new/libop/op_cpu_type.h
> --- oprofile/libop/op_cpu_type.h	2010-11-07 15:28:36.272421729 -0600
> +++ oprofile-new/libop/op_cpu_type.h	2010-11-05 17:31:28.310338285 -0500
> @@ -84,6 +84,9 @@ typedef enum {
>  	CPU_ARM_V7_CA9, /**< ARM Cortex-A9 */
>  	CPU_MIPS_74K, /**< MIPS 74K */
>  	CPU_MIPS_1004K, /**< MIPS 1004K */
> +	CPU_FAMILY12H, /**< AMD family 12h */
> +	CPU_FAMILY14H, /**< AMD family 14h */
> +	CPU_FAMILY15H, /**< AMD family 15h */
>  	MAX_CPU_TYPE
>  } op_cpu;
> 
> diff -paurN oprofile/libop/op_cpu_type.c oprofile-new/libop/op_cpu_type.c
> --- oprofile/libop/op_cpu_type.c	2010-11-07 15:28:36.272421729 -0600
> +++ oprofile-new/libop/op_cpu_type.c	2010-11-05 18:00:24.750339157 -0500
> @@ -87,6 +87,9 @@ static struct cpu_descr const cpu_descrs
>  	{ "ARM Cortex-A9", "arm/armv7-ca9", CPU_ARM_V7_CA9, 7 },
>  	{ "MIPS 74K", "mips/74K", CPU_MIPS_74K, 4},
>  	{ "MIPS 1004K", "mips/1004K", CPU_MIPS_1004K, 2},
> +	{ "AMD64 family12h", "x86-64/family12h", CPU_FAMILY12H, 4 },
> +	{ "AMD64 family14h", "x86-64/family14h", CPU_FAMILY14H, 4 },
> +	{ "AMD64 family15h", "x86-64/family15h", CPU_FAMILY15H, 6 },
>  };
>   
>  static size_t const nr_cpu_descrs = sizeof(cpu_descrs) / sizeof(struct cpu_descr);
> diff -paurN oprofile/utils/ophelp.c oprofile-new/utils/ophelp.c
> --- oprofile/utils/ophelp.c	2010-11-07 15:28:36.312347542 -0600
> +++ oprofile-new/utils/ophelp.c	2010-11-05 17:33:43.350251254 -0500
> @@ -469,6 +469,18 @@ int main(int argc, char const * argv[])
>  			"See BIOS and Kernel Developer's Guide for AMD Family 11h Processors\n"
>  			"(41256.pdf), Section 3.14\n\n";
>  		break;
> +	case CPU_FAMILY12H:
> +		event_doc =
> +			"See BIOS and Kernel Developer's Guide for AMD Family 12h Processors\n";
> +		break;
> +	case CPU_FAMILY14H:
> +		event_doc =
> +			"See BIOS and Kernel Developer's Guide for AMD Family 14h Processors\n";
> +		break;
> +	case CPU_FAMILY15H:
> +		event_doc =
> +			"See BIOS and Kernel Developer's Guide for AMD Family 15h Processors\n";
> +		break;
>  	case CPU_ATHLON:
>  		event_doc =
>  			"See AMD Athlon Processor x86 Code Optimization Guide\n"
> diff -paurN oprofile/events/x86-64/family12h/events oprofile-new/events/x86-64/family12h/events
> --- oprofile/events/x86-64/family12h/events	1969-12-31 18:00:00.000000000 -0600
> +++ oprofile-new/events/x86-64/family12h/events	2010-11-05 13:48:23.431572933 -0500
> @@ -0,0 +1,23 @@
> +# AMD Generic performance events
> +#
> +# Copyright OProfile authors
> +# Copyright (c) 2006-2010 Advanced Micro Devices
> +# Contributed by Ray Bryant <raybry at amd.com>,
> +#		Jason Yeh <jason.yeh at amd.com>
> +#		Suravee Suthikulpanit <suravee.suthikulpanit at amd.com>
> +#
> +# Revision: 1.0
> +#
> +# ChangeLog: 
> +#	1.0: 30 August 2010.
> +#	- Initial revision
> +#
> +event:0x40 counters:0,1,2,3 um:zero minimum:500 name:DATA_CACHE_ACCESSES : Data cache accesses
> +event:0x41 counters:0,1,2,3 um:zero minimum:500 name:DATA_CACHE_MISSES : Data cache misses
> +event:0x42 counters:0,1,2,3 um:moess minimum:500 name:DATA_CACHE_REFILLS_FROM_L2_OR_NORTHBRIDGE : Data cache refills from L2 or Northbridge
> +event:0x43 counters:0,1,2,3 um:moesi minimum:500 name:DATA_CACHE_REFILLS_FROM_NORTHBRIDGE : Data cache refills from Northbridge
> +event:0x76 counters:0,1,2,3 um:zero minimum:50000 name:CPU_CLK_UNHALTED : Cycles outside of halt state
> +event:0xc0 counters:0,1,2,3 um:zero minimum:50000 name:RETIRED_INSTRUCTIONS : Retired instructions (includes exceptions, interrupts, re-syncs)
> +event:0xc1 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_UOPS : Retired micro-ops
> +event:0xc2 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_BRANCH_INSTRUCTIONS : Retired branches (conditional, unconditional, exceptions, interrupts)
> +event:0xc3 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_MISPREDICTED_BRANCH_INSTRUCTIONS : Retired mispredicted branch instructions
> diff -paurN oprofile/events/x86-64/family12h/unit_masks oprofile-new/events/x86-64/family12h/unit_masks
> --- oprofile/events/x86-64/family12h/unit_masks	1969-12-31 18:00:00.000000000 -0600
> +++ oprofile-new/events/x86-64/family12h/unit_masks	2010-11-05 13:48:26.980337765 -0500
> @@ -0,0 +1,30 @@
> +# AMD Generic unit masks
> +#
> +# Copyright OProfile authors
> +# Copyright (c) 2006-2010 Advanced Micro Devices
> +# Contributed by Ray Bryant <raybry at amd.com>,
> +#		Jason Yeh <jason.yeh at amd.com>
> +#		Suravee Suthikulpanit <suravee.suthikulpanit at amd.com>
> +#
> +# Revision: 1.0
> +#
> +# ChangeLog: 
> +#	1.0: 30 August 2010.
> +#	- Initial revision
> +#
> +name:zero type:mandatory default:0x0
> +	0x0 No unit mask
> +name:moesi type:bitmask default:0x1f
> +	0x01 (I)nvalid cache state
> +	0x02 (S)hared cache state
> +	0x04 (E)xclusive cache state
> +	0x08 (O)wner cache state
> +	0x10 (M)odified cache state
> +	0x1f All cache states
> +name:moess type:bitmask default:0x1e
> +	0x01 Refill from northbridge
> +	0x02 Shared-state line from L2
> +	0x04 Exclusive-state line from L2
> +	0x08 Owner-state line from L2
> +	0x10 Modified-state line from L2
> +	0x1e All cache states except refill from northbridge
> diff -paurN oprofile/events/x86-64/family14h/events oprofile-new/events/x86-64/family14h/events
> --- oprofile/events/x86-64/family14h/events	1969-12-31 18:00:00.000000000 -0600
> +++ oprofile-new/events/x86-64/family14h/events	2010-11-05 13:48:59.390338613 -0500
> @@ -0,0 +1,23 @@
> +# AMD Generic performance events
> +#
> +# Copyright OProfile authors
> +# Copyright (c) 2006-2010 Advanced Micro Devices
> +# Contributed by Ray Bryant <raybry at amd.com>,
> +#		Jason Yeh <jason.yeh at amd.com>
> +#		Suravee Suthikulpanit <suravee.suthikulpanit at amd.com>
> +#
> +# Revision: 1.0
> +#
> +# ChangeLog: 
> +#	1.0: 30 August 2010.
> +#	- Initial revision
> +#
> +event:0x40 counters:0,1,2,3 um:zero minimum:500 name:DATA_CACHE_ACCESSES : Data cache accesses
> +event:0x41 counters:0,1,2,3 um:zero minimum:500 name:DATA_CACHE_MISSES : Data cache misses
> +event:0x42 counters:0,1,2,3 um:moess minimum:500 name:DATA_CACHE_REFILLS_FROM_L2_OR_NORTHBRIDGE : Data cache refills from L2 or Northbridge
> +event:0x43 counters:0,1,2,3 um:moesi minimum:500 name:DATA_CACHE_REFILLS_FROM_NORTHBRIDGE : Data cache refills from Northbridge
> +event:0x76 counters:0,1,2,3 um:zero minimum:50000 name:CPU_CLK_UNHALTED : Cycles outside of halt state
> +event:0xc0 counters:0,1,2,3 um:zero minimum:50000 name:RETIRED_INSTRUCTIONS : Retired instructions (includes exceptions, interrupts, re-syncs)
> +event:0xc1 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_UOPS : Retired micro-ops
> +event:0xc2 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_BRANCH_INSTRUCTIONS : Retired branches (conditional, unconditional, exceptions, interrupts)
> +event:0xc3 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_MISPREDICTED_BRANCH_INSTRUCTIONS : Retired mispredicted branch instructions
> diff -paurN oprofile/events/x86-64/family14h/unit_masks oprofile-new/events/x86-64/family14h/unit_masks
> --- oprofile/events/x86-64/family14h/unit_masks	1969-12-31 18:00:00.000000000 -0600
> +++ oprofile-new/events/x86-64/family14h/unit_masks	2010-11-05 13:49:03.960338736 -0500
> @@ -0,0 +1,30 @@
> +# AMD Generic unit masks
> +#
> +# Copyright OProfile authors
> +# Copyright (c) 2006-2010 Advanced Micro Devices
> +# Contributed by Ray Bryant <raybry at amd.com>,
> +#		Jason Yeh <jason.yeh at amd.com>
> +#		Suravee Suthikulpanit <suravee.suthikulpanit at amd.com>
> +#
> +# Revision: 1.0
> +#
> +# ChangeLog: 
> +#	1.0: 30 August 2010.
> +#	- Initial revision
> +#
> +name:zero type:mandatory default:0x0
> +	0x0 No unit mask
> +name:moesi type:bitmask default:0x1f
> +	0x01 (I)nvalid cache state
> +	0x02 (S)hared cache state
> +	0x04 (E)xclusive cache state
> +	0x08 (O)wner cache state
> +	0x10 (M)odified cache state
> +	0x1f All cache states
> +name:moess type:bitmask default:0x1e
> +	0x01 Refill from northbridge
> +	0x02 Shared-state line from L2
> +	0x04 Exclusive-state line from L2
> +	0x08 Owner-state line from L2
> +	0x10 Modified-state line from L2
> +	0x1e All cache states except refill from northbridge
> diff -paurN oprofile/events/x86-64/family15h/events oprofile-new/events/x86-64/family15h/events
> --- oprofile/events/x86-64/family15h/events	1969-12-31 18:00:00.000000000 -0600
> +++ oprofile-new/events/x86-64/family15h/events	2010-11-08 09:46:35.631313253 -0600
> @@ -0,0 +1,16 @@
> +# AMD Generic performance events
> +#
> +# Copyright OProfile authors
> +# Copyright (c) 2006-2010 Advanced Micro Devices
> +# Contributed by Ray Bryant <raybry at amd.com>,
> +#		Jason Yeh <jason.yeh at amd.com>
> +#		Suravee Suthikulpanit <suravee.suthikulpanit at amd.com>
> +#
> +# Revision: 1.0
> +#
> +# ChangeLog: 
> +#	1.0: 30 August 2010.
> +#	- Initial revision
> +#
> +event:0x76 counters:0,1,2 um:zero minimum:50000 name:CPU_CLK_UNHALTED : Cycles outside of halt state
> +event:0xc0 counters:0,1,2,3,4,5 um:zero minimum:50000 name:RETIRED_INSTRUCTIONS : Retired instructions (includes exceptions, interrupts, re-syncs)
> diff -paurN oprofile/events/x86-64/family15h/unit_masks oprofile-new/events/x86-64/family15h/unit_masks
> --- oprofile/events/x86-64/family15h/unit_masks	1969-12-31 18:00:00.000000000 -0600
> +++ oprofile-new/events/x86-64/family15h/unit_masks	2010-11-08 09:57:38.211395102 -0600
> @@ -0,0 +1,16 @@
> +# AMD Generic unit masks
> +#
> +# Copyright OProfile authors
> +# Copyright (c) 2006-2010 Advanced Micro Devices
> +# Contributed by Ray Bryant <raybry at amd.com>,
> +#		Jason Yeh <jason.yeh at amd.com>
> +#		Suravee Suthikulpanit <suravee.suthikulpanit at amd.com>
> +#
> +# Revision: 1.0
> +#
> +# ChangeLog: 
> +#	1.0: 30 August 2010.
> +#	- Initial revision
> +#
> +name:zero type:mandatory default:0x0
> +	0x0 No unit mask
> 
> 
> 
> 
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>

The support for family 12/14 will be in v2.6.37-rc1.  The family 15h will be in v2.6.38.

Suravee

-----Original Message-----
From: Maynard Johnson [mailto:maynardj@...] 
Sent: Wednesday, November 17, 2010 11:06 AM
To: Suthikulpanit, Suravee
Cc: oprofile-list@...
Subject: Re: [PATCH1/1] Add support for family12h/14h/15h events

Suravee Suthikulpanit wrote:
> 
> This patch enables the support (add new proccessor string and 
> events/unitmask files) for AMD processor family12h, family14h, and family15h.
Suravee,
This patch looks fine to me.  An 'ack' from Robert Richter would be good, though.  Is the kernel support upstream for these processor families?  If not, what's the ETA?  Does 'make distcheck' succeed?  And, finally, the patch needs a "Signed-off-by" line.  Just reply-all to this note and paste it in.  Go ahead and check it in when ready.

Thanks.
-Maynard
> 
>  ChangeLog-family12-14-15           |   15 +++++++++++++++
>  events/Makefile.am                 |    3 +++
>  events/x86-64/family12h/events     |   23 +++++++++++++++++++++++
>  events/x86-64/family12h/unit_masks |   30 ++++++++++++++++++++++++++++++
>  events/x86-64/family14h/events     |   23 +++++++++++++++++++++++
>  events/x86-64/family14h/unit_masks |   30 ++++++++++++++++++++++++++++++
>  events/x86-64/family15h/events     |   16 ++++++++++++++++
>  events/x86-64/family15h/unit_masks |   16 ++++++++++++++++
>  libop/op_cpu_type.c                |    3 +++
>  libop/op_cpu_type.h                |    3 +++
>  libop/op_events.c                  |    3 +++
>  utils/ophelp.c                     |   12 ++++++++++++
>  12 files changed, 177 insertions(+)
> 
> ----
> diff -paurN oprofile/ChangeLog oprofile-new/ChangeLog-family12-14-15
> --- oprofile/ChangeLog	2010-11-07 15:28:36.112419594 -0600
> +++ oprofile-new/ChangeLog-family12-14-15	2010-11-07 16:17:29.031184728 -0600
> @@ -1,3 +1,18 @@
> +2010-11-7  Suravee Suthikulpanit <suravee.suthikulpanit@...>
> +
> +	* events/Makefile.am:
> +	* libop/op_events.c:
> +	* libop/op_cpu_type.h:
> +	* libop/op_cpu_type.c:
> +	* utils/ophelp.c:
> +	* events/x86-64/family12h/events: New File
> +	* events/x86-64/family12h/unit_masks: New File
> +	* events/x86-64/family14h/events: New File
> +	* events/x86-64/family14h/unit_masks: New File
> +	* events/x86-64/family15h/events: New File
> +	* events/x86-64/family15h/unit_masks: New File
> +	  Add support for new AMD processors (family12h/14h/15h)
> +
>  2010-10-15  Roland Grunberg  <roland.grunberg@...>
> 
>  	* libop/op_xml_events.c:
> diff -paurN oprofile/events/Makefile.am oprofile-new/events/Makefile.am
> --- oprofile/events/Makefile.am	2010-11-07 15:28:36.422353220 -0600
> +++ oprofile-new/events/Makefile.am	2010-11-05 17:30:42.640272475 -0500
> @@ -35,6 +35,9 @@ event_files = \
>  	x86-64/hammer/events x86-64/hammer/unit_masks \
>  	x86-64/family10/events x86-64/family10/unit_masks \
>  	x86-64/family11h/events x86-64/family11h/unit_masks \
> +	x86-64/family12h/events x86-64/family12h/unit_masks \
> +	x86-64/family14h/events x86-64/family14h/unit_masks \
> +	x86-64/family15h/events x86-64/family15h/unit_masks \
>  	arm/xscale1/events arm/xscale1/unit_masks \
>  	arm/xscale2/events arm/xscale2/unit_masks \
>  	arm/armv6/events arm/armv6/unit_masks \ diff -paurN 
> oprofile/libop/op_events.c oprofile-new/libop/op_events.c
> --- oprofile/libop/op_events.c	2010-11-07 15:28:36.272421729 -0600
> +++ oprofile-new/libop/op_events.c	2010-11-05 17:32:21.221347227 -0500
> @@ -972,6 +972,9 @@ void op_default_event(op_cpu cpu_type, s
>   		case CPU_CORE_I7:
>  		case CPU_NEHALEM:
>  		case CPU_MIPS_LOONGSON2:
> +		case CPU_FAMILY12H:
> +		case CPU_FAMILY14H:
> +		case CPU_FAMILY15H:
>  			descr->name = "CPU_CLK_UNHALTED";
>  			break;
> 
> diff -paurN oprofile/libop/op_cpu_type.h oprofile-new/libop/op_cpu_type.h
> --- oprofile/libop/op_cpu_type.h	2010-11-07 15:28:36.272421729 -0600
> +++ oprofile-new/libop/op_cpu_type.h	2010-11-05 17:31:28.310338285 -0500
> @@ -84,6 +84,9 @@ typedef enum {
>  	CPU_ARM_V7_CA9, /**< ARM Cortex-A9 */
>  	CPU_MIPS_74K, /**< MIPS 74K */
>  	CPU_MIPS_1004K, /**< MIPS 1004K */
> +	CPU_FAMILY12H, /**< AMD family 12h */
> +	CPU_FAMILY14H, /**< AMD family 14h */
> +	CPU_FAMILY15H, /**< AMD family 15h */
>  	MAX_CPU_TYPE
>  } op_cpu;
> 
> diff -paurN oprofile/libop/op_cpu_type.c oprofile-new/libop/op_cpu_type.c
> --- oprofile/libop/op_cpu_type.c	2010-11-07 15:28:36.272421729 -0600
> +++ oprofile-new/libop/op_cpu_type.c	2010-11-05 18:00:24.750339157 -0500
> @@ -87,6 +87,9 @@ static struct cpu_descr const cpu_descrs
>  	{ "ARM Cortex-A9", "arm/armv7-ca9", CPU_ARM_V7_CA9, 7 },
>  	{ "MIPS 74K", "mips/74K", CPU_MIPS_74K, 4},
>  	{ "MIPS 1004K", "mips/1004K", CPU_MIPS_1004K, 2},
> +	{ "AMD64 family12h", "x86-64/family12h", CPU_FAMILY12H, 4 },
> +	{ "AMD64 family14h", "x86-64/family14h", CPU_FAMILY14H, 4 },
> +	{ "AMD64 family15h", "x86-64/family15h", CPU_FAMILY15H, 6 },
>  };
>   
>  static size_t const nr_cpu_descrs = sizeof(cpu_descrs) / 
> sizeof(struct cpu_descr); diff -paurN oprofile/utils/ophelp.c oprofile-new/utils/ophelp.c
> --- oprofile/utils/ophelp.c	2010-11-07 15:28:36.312347542 -0600
> +++ oprofile-new/utils/ophelp.c	2010-11-05 17:33:43.350251254 -0500
> @@ -469,6 +469,18 @@ int main(int argc, char const * argv[])
>  			"See BIOS and Kernel Developer's Guide for AMD Family 11h Processors\n"
>  			"(41256.pdf), Section 3.14\n\n";
>  		break;
> +	case CPU_FAMILY12H:
> +		event_doc =
> +			"See BIOS and Kernel Developer's Guide for AMD Family 12h Processors\n";
> +		break;
> +	case CPU_FAMILY14H:
> +		event_doc =
> +			"See BIOS and Kernel Developer's Guide for AMD Family 14h Processors\n";
> +		break;
> +	case CPU_FAMILY15H:
> +		event_doc =
> +			"See BIOS and Kernel Developer's Guide for AMD Family 15h Processors\n";
> +		break;
>  	case CPU_ATHLON:
>  		event_doc =
>  			"See AMD Athlon Processor x86 Code Optimization Guide\n"
> diff -paurN oprofile/events/x86-64/family12h/events oprofile-new/events/x86-64/family12h/events
> --- oprofile/events/x86-64/family12h/events	1969-12-31 18:00:00.000000000 -0600
> +++ oprofile-new/events/x86-64/family12h/events	2010-11-05 13:48:23.431572933 -0500
> @@ -0,0 +1,23 @@
> +# AMD Generic performance events
> +#
> +# Copyright OProfile authors
> +# Copyright (c) 2006-2010 Advanced Micro Devices # Contributed by Ray 
> +Bryant <raybry at amd.com>,
> +#		Jason Yeh <jason.yeh at amd.com>
> +#		Suravee Suthikulpanit <suravee.suthikulpanit at amd.com>
> +#
> +# Revision: 1.0
> +#
> +# ChangeLog: 
> +#	1.0: 30 August 2010.
> +#	- Initial revision
> +#
> +event:0x40 counters:0,1,2,3 um:zero minimum:500 
> +name:DATA_CACHE_ACCESSES : Data cache accesses
> +event:0x41 counters:0,1,2,3 um:zero minimum:500 
> +name:DATA_CACHE_MISSES : Data cache misses
> +event:0x42 counters:0,1,2,3 um:moess minimum:500 
> +name:DATA_CACHE_REFILLS_FROM_L2_OR_NORTHBRIDGE : Data cache refills 
> +from L2 or Northbridge
> +event:0x43 counters:0,1,2,3 um:moesi minimum:500 
> +name:DATA_CACHE_REFILLS_FROM_NORTHBRIDGE : Data cache refills from 
> +Northbridge
> +event:0x76 counters:0,1,2,3 um:zero minimum:50000 
> +name:CPU_CLK_UNHALTED : Cycles outside of halt state
> +event:0xc0 counters:0,1,2,3 um:zero minimum:50000 
> +name:RETIRED_INSTRUCTIONS : Retired instructions (includes 
> +exceptions, interrupts, re-syncs)
> +event:0xc1 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_UOPS : 
> +Retired micro-ops
> +event:0xc2 counters:0,1,2,3 um:zero minimum:500 
> +name:RETIRED_BRANCH_INSTRUCTIONS : Retired branches (conditional, 
> +unconditional, exceptions, interrupts)
> +event:0xc3 counters:0,1,2,3 um:zero minimum:500 
> +name:RETIRED_MISPREDICTED_BRANCH_INSTRUCTIONS : Retired mispredicted 
> +branch instructions
> diff -paurN oprofile/events/x86-64/family12h/unit_masks oprofile-new/events/x86-64/family12h/unit_masks
> --- oprofile/events/x86-64/family12h/unit_masks	1969-12-31 18:00:00.000000000 -0600
> +++ oprofile-new/events/x86-64/family12h/unit_masks	2010-11-05 13:48:26.980337765 -0500
> @@ -0,0 +1,30 @@
> +# AMD Generic unit masks
> +#
> +# Copyright OProfile authors
> +# Copyright (c) 2006-2010 Advanced Micro Devices # Contributed by Ray 
> +Bryant <raybry at amd.com>,
> +#		Jason Yeh <jason.yeh at amd.com>
> +#		Suravee Suthikulpanit <suravee.suthikulpanit at amd.com>
> +#
> +# Revision: 1.0
> +#
> +# ChangeLog: 
> +#	1.0: 30 August 2010.
> +#	- Initial revision
> +#
> +name:zero type:mandatory default:0x0
> +	0x0 No unit mask
> +name:moesi type:bitmask default:0x1f
> +	0x01 (I)nvalid cache state
> +	0x02 (S)hared cache state
> +	0x04 (E)xclusive cache state
> +	0x08 (O)wner cache state
> +	0x10 (M)odified cache state
> +	0x1f All cache states
> +name:moess type:bitmask default:0x1e
> +	0x01 Refill from northbridge
> +	0x02 Shared-state line from L2
> +	0x04 Exclusive-state line from L2
> +	0x08 Owner-state line from L2
> +	0x10 Modified-state line from L2
> +	0x1e All cache states except refill from northbridge
> diff -paurN oprofile/events/x86-64/family14h/events oprofile-new/events/x86-64/family14h/events
> --- oprofile/events/x86-64/family14h/events	1969-12-31 18:00:00.000000000 -0600
> +++ oprofile-new/events/x86-64/family14h/events	2010-11-05 13:48:59.390338613 -0500
> @@ -0,0 +1,23 @@
> +# AMD Generic performance events
> +#
> +# Copyright OProfile authors
> +# Copyright (c) 2006-2010 Advanced Micro Devices # Contributed by Ray 
> +Bryant <raybry at amd.com>,
> +#		Jason Yeh <jason.yeh at amd.com>
> +#		Suravee Suthikulpanit <suravee.suthikulpanit at amd.com>
> +#
> +# Revision: 1.0
> +#
> +# ChangeLog: 
> +#	1.0: 30 August 2010.
> +#	- Initial revision
> +#
> +event:0x40 counters:0,1,2,3 um:zero minimum:500 
> +name:DATA_CACHE_ACCESSES : Data cache accesses
> +event:0x41 counters:0,1,2,3 um:zero minimum:500 
> +name:DATA_CACHE_MISSES : Data cache misses
> +event:0x42 counters:0,1,2,3 um:moess minimum:500 
> +name:DATA_CACHE_REFILLS_FROM_L2_OR_NORTHBRIDGE : Data cache refills 
> +from L2 or Northbridge
> +event:0x43 counters:0,1,2,3 um:moesi minimum:500 
> +name:DATA_CACHE_REFILLS_FROM_NORTHBRIDGE : Data cache refills from 
> +Northbridge
> +event:0x76 counters:0,1,2,3 um:zero minimum:50000 
> +name:CPU_CLK_UNHALTED : Cycles outside of halt state
> +event:0xc0 counters:0,1,2,3 um:zero minimum:50000 
> +name:RETIRED_INSTRUCTIONS : Retired instructions (includes 
> +exceptions, interrupts, re-syncs)
> +event:0xc1 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_UOPS : 
> +Retired micro-ops
> +event:0xc2 counters:0,1,2,3 um:zero minimum:500 
> +name:RETIRED_BRANCH_INSTRUCTIONS : Retired branches (conditional, 
> +unconditional, exceptions, interrupts)
> +event:0xc3 counters:0,1,2,3 um:zero minimum:500 
> +name:RETIRED_MISPREDICTED_BRANCH_INSTRUCTIONS : Retired mispredicted 
> +branch instructions
> diff -paurN oprofile/events/x86-64/family14h/unit_masks oprofile-new/events/x86-64/family14h/unit_masks
> --- oprofile/events/x86-64/family14h/unit_masks	1969-12-31 18:00:00.000000000 -0600
> +++ oprofile-new/events/x86-64/family14h/unit_masks	2010-11-05 13:49:03.960338736 -0500
> @@ -0,0 +1,30 @@
> +# AMD Generic unit masks
> +#
> +# Copyright OProfile authors
> +# Copyright (c) 2006-2010 Advanced Micro Devices # Contributed by Ray 
> +Bryant <raybry at amd.com>,
> +#		Jason Yeh <jason.yeh at amd.com>
> +#		Suravee Suthikulpanit <suravee.suthikulpanit at amd.com>
> +#
> +# Revision: 1.0
> +#
> +# ChangeLog: 
> +#	1.0: 30 August 2010.
> +#	- Initial revision
> +#
> +name:zero type:mandatory default:0x0
> +	0x0 No unit mask
> +name:moesi type:bitmask default:0x1f
> +	0x01 (I)nvalid cache state
> +	0x02 (S)hared cache state
> +	0x04 (E)xclusive cache state
> +	0x08 (O)wner cache state
> +	0x10 (M)odified cache state
> +	0x1f All cache states
> +name:moess type:bitmask default:0x1e
> +	0x01 Refill from northbridge
> +	0x02 Shared-state line from L2
> +	0x04 Exclusive-state line from L2
> +	0x08 Owner-state line from L2
> +	0x10 Modified-state line from L2
> +	0x1e All cache states except refill from northbridge
> diff -paurN oprofile/events/x86-64/family15h/events oprofile-new/events/x86-64/family15h/events
> --- oprofile/events/x86-64/family15h/events	1969-12-31 18:00:00.000000000 -0600
> +++ oprofile-new/events/x86-64/family15h/events	2010-11-08 09:46:35.631313253 -0600
> @@ -0,0 +1,16 @@
> +# AMD Generic performance events
> +#
> +# Copyright OProfile authors
> +# Copyright (c) 2006-2010 Advanced Micro Devices # Contributed by Ray 
> +Bryant <raybry at amd.com>,
> +#		Jason Yeh <jason.yeh at amd.com>
> +#		Suravee Suthikulpanit <suravee.suthikulpanit at amd.com>
> +#
> +# Revision: 1.0
> +#
> +# ChangeLog: 
> +#	1.0: 30 August 2010.
> +#	- Initial revision
> +#
> +event:0x76 counters:0,1,2 um:zero minimum:50000 name:CPU_CLK_UNHALTED 
> +: Cycles outside of halt state
> +event:0xc0 counters:0,1,2,3,4,5 um:zero minimum:50000 
> +name:RETIRED_INSTRUCTIONS : Retired instructions (includes 
> +exceptions, interrupts, re-syncs)
> diff -paurN oprofile/events/x86-64/family15h/unit_masks oprofile-new/events/x86-64/family15h/unit_masks
> --- oprofile/events/x86-64/family15h/unit_masks	1969-12-31 18:00:00.000000000 -0600
> +++ oprofile-new/events/x86-64/family15h/unit_masks	2010-11-08 09:57:38.211395102 -0600
> @@ -0,0 +1,16 @@
> +# AMD Generic unit masks
> +#
> +# Copyright OProfile authors
> +# Copyright (c) 2006-2010 Advanced Micro Devices # Contributed by Ray 
> +Bryant <raybry at amd.com>,
> +#		Jason Yeh <jason.yeh at amd.com>
> +#		Suravee Suthikulpanit <suravee.suthikulpanit at amd.com>
> +#
> +# Revision: 1.0
> +#
> +# ChangeLog: 
> +#	1.0: 30 August 2010.
> +#	- Initial revision
> +#
> +name:zero type:mandatory default:0x0
> +	0x0 No unit mask
> 
> 
> 
> 
> ----------------------------------------------------------------------
> -------- Centralized Desktop Delivery: Dell and VMware Reference 
> Architecture Simplifying enterprise desktop deployment and management 
> using Dell EqualLogic storage and VMware View: A highly scalable, 
> end-to-end client virtualization framework. Read more!
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> _______________________________________________
> oprofile-list mailing list
> oprofile-list@...
> https://lists.sourceforge.net/lists/listinfo/oprofile-list
>

On 15.11.10 10:42:34, Suravee Suthikulpanit wrote:
> 
> This patch enables the support (add new proccessor string and events/unitmask files)
> for AMD processor family12h, family14h, and family15h.
> 
>  ChangeLog-family12-14-15           |   15 +++++++++++++++
>  events/Makefile.am                 |    3 +++
>  events/x86-64/family12h/events     |   23 +++++++++++++++++++++++
>  events/x86-64/family12h/unit_masks |   30 ++++++++++++++++++++++++++++++
>  events/x86-64/family14h/events     |   23 +++++++++++++++++++++++
>  events/x86-64/family14h/unit_masks |   30 ++++++++++++++++++++++++++++++
>  events/x86-64/family15h/events     |   16 ++++++++++++++++
>  events/x86-64/family15h/unit_masks |   16 ++++++++++++++++
>  libop/op_cpu_type.c                |    3 +++
>  libop/op_cpu_type.h                |    3 +++
>  libop/op_events.c                  |    3 +++
>  utils/ophelp.c                     |   12 ++++++++++++
>  12 files changed, 177 insertions(+)

Support for families 12h and 14h is in v2.6.37.

Support for family 15h will be in v2.6.38, I will post patches soon.

Acked-by: Robert Richter <robert.richter@...>

-Robert

-- 
Advanced Micro Devices, Inc.
Operating System Research Center

On 11/15/2010 10:42 AM, Suravee Suthikulpanit wrote:
> 
> This patch enables the support (add new proccessor string and events/unitmask files)
> for AMD processor family12h, family14h, and family15h.
> 
>  ChangeLog-family12-14-15           |   15 +++++++++++++++
>  events/Makefile.am                 |    3 +++
>  events/x86-64/family12h/events     |   23 +++++++++++++++++++++++
>  events/x86-64/family12h/unit_masks |   30 ++++++++++++++++++++++++++++++
>  events/x86-64/family14h/events     |   23 +++++++++++++++++++++++
>  events/x86-64/family14h/unit_masks |   30 ++++++++++++++++++++++++++++++
>  events/x86-64/family15h/events     |   16 ++++++++++++++++
>  events/x86-64/family15h/unit_masks |   16 ++++++++++++++++
>  libop/op_cpu_type.c                |    3 +++
>  libop/op_cpu_type.h                |    3 +++
>  libop/op_events.c                  |    3 +++
>  utils/ophelp.c                     |   12 ++++++++++++
>  12 files changed, 177 insertions(+)


Hi Suravee,

The family12h/events and family14h/events files are identical. Same for the unit_mask files. Would there be any reason not to factor those out and handle in the same manner as the i386/arch_perfmon events for the Intel Architectural Performance monitoring events?

The list events for the x86-64/family15h looks pretty short. Are there going to be some additional events for x86-64/family15h?

-Will

Will,

These files are temporary.  I would like to add the basic supports to go
along with the kernel changes that Robert is submitting to the Linux
kernel.  I'm planning to update these files with the full-version as
soon as the information is public.

I didn't consider using the i386/arch_perfmon style because the
events/unit_mask for the what consider to be "generic events" could be
different from one architecture to another for AMD processors.

Suravee

On Wed, 2010-12-01 at 09:42 -0600, William Cohen wrote:
> On 11/15/2010 10:42 AM, Suravee Suthikulpanit wrote:
> > 
> > This patch enables the support (add new proccessor string and events/unitmask files)
> > for AMD processor family12h, family14h, and family15h.
> > 
> >  ChangeLog-family12-14-15           |   15 +++++++++++++++
> >  events/Makefile.am                 |    3 +++
> >  events/x86-64/family12h/events     |   23 +++++++++++++++++++++++
> >  events/x86-64/family12h/unit_masks |   30 ++++++++++++++++++++++++++++++
> >  events/x86-64/family14h/events     |   23 +++++++++++++++++++++++
> >  events/x86-64/family14h/unit_masks |   30 ++++++++++++++++++++++++++++++
> >  events/x86-64/family15h/events     |   16 ++++++++++++++++
> >  events/x86-64/family15h/unit_masks |   16 ++++++++++++++++
> >  libop/op_cpu_type.c                |    3 +++
> >  libop/op_cpu_type.h                |    3 +++
> >  libop/op_events.c                  |    3 +++
> >  utils/ophelp.c                     |   12 ++++++++++++
> >  12 files changed, 177 insertions(+)
> 
> 
> Hi Suravee,
> 
> The family12h/events and family14h/events files are identical. Same for the unit_mask files. Would there be any reason not to factor those out and handle in the same manner as the i386/arch_perfmon events for the Intel Architectural Performance monitoring events?
> 
> The list events for the x86-64/family15h looks pretty short. Are there going to be some additional events for x86-64/family15h?
> 
> -Will
> 
> ------------------------------------------------------------------------------
> Increase Visibility of Your 3D Game App & Earn a Chance To Win $500!
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> optimizing for Intel(R) Graphics Technology. Get started today with the
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> _______________________________________________
> oprofile-list mailing list
> oprofile-list@...
> https://lists.sourceforge.net/lists/listinfo/oprofile-list
>

Suravee Suthikulpanit said the following on 11/15/10 10:42:
>
> This patch enables the support (add new proccessor string and events/unitmask files)
> for AMD processor family12h, family14h, and family15h.
>
>   ChangeLog-family12-14-15           |   15 +++++++++++++++
>   events/Makefile.am                 |    3 +++
>   events/x86-64/family12h/events     |   23 +++++++++++++++++++++++
>   events/x86-64/family12h/unit_masks |   30 ++++++++++++++++++++++++++++++
>   events/x86-64/family14h/events     |   23 +++++++++++++++++++++++
>   events/x86-64/family14h/unit_masks |   30 ++++++++++++++++++++++++++++++
>   events/x86-64/family15h/events     |   16 ++++++++++++++++
>   events/x86-64/family15h/unit_masks |   16 ++++++++++++++++
>   libop/op_cpu_type.c                |    3 +++
>   libop/op_cpu_type.h                |    3 +++
>   libop/op_events.c                  |    3 +++
>   utils/ophelp.c                     |   12 ++++++++++++
>   12 files changed, 177 insertions(+)

Not sure if I am doing something wrong.  But with the latest CVS version 
that I checked out yesterday, I get the following error when doing:

# make distcheck
<snip>
make[1]: Entering directory `/home/john/sources/oprofile-test/events'
make[1]: *** No rule to make target `x86-64/family12h/events', needed by 
`distdir'.  Stop.
<snip>

Is there a bug somewhere?

Thanks,
John



-- 
John Villalovos
Intel Corporation on-site partner engineer at Red Hat, Inc.

http://tabasco.usersys.redhat.com/

On 12/16/2010 10:29 AM, John Villalovos wrote:
> Suravee Suthikulpanit said the following on 11/15/10 10:42:
>>
>> This patch enables the support (add new proccessor string and events/unitmask
>> files)
>> for AMD processor family12h, family14h, and family15h.
>>
>> ChangeLog-family12-14-15 | 15 +++++++++++++++
>> events/Makefile.am | 3 +++
>> events/x86-64/family12h/events | 23 +++++++++++++++++++++++
>> events/x86-64/family12h/unit_masks | 30 ++++++++++++++++++++++++++++++
>> events/x86-64/family14h/events | 23 +++++++++++++++++++++++
>> events/x86-64/family14h/unit_masks | 30 ++++++++++++++++++++++++++++++
>> events/x86-64/family15h/events | 16 ++++++++++++++++
>> events/x86-64/family15h/unit_masks | 16 ++++++++++++++++
>> libop/op_cpu_type.c | 3 +++
>> libop/op_cpu_type.h | 3 +++
>> libop/op_events.c | 3 +++
>> utils/ophelp.c | 12 ++++++++++++
>> 12 files changed, 177 insertions(+)
>
> Not sure if I am doing something wrong. But with the latest CVS version that I
> checked out yesterday, I get the following error when doing:
>
> # make distcheck
> <snip>
> make[1]: Entering directory `/home/john/sources/oprofile-test/events'
> make[1]: *** No rule to make target `x86-64/family12h/events', needed by
> `distdir'. Stop.

John, make sure you run autogen.sh and configure to generate the new makefiles 
needed for Suravee's new family12|14|15h stuff.

-Maynard

> <snip>
>
> Is there a bug somewhere?
>
> Thanks,
> John
>
>
>

Maynard Johnson said the following on 12/16/10 11:36:
> On 12/16/2010 10:29 AM, John Villalovos wrote:
>> Not sure if I am doing something wrong. But with the latest CVS
>> version that I
>> checked out yesterday, I get the following error when doing:
>>
>> # make distcheck
>> <snip>
>> make[1]: Entering directory `/home/john/sources/oprofile-test/events'
>> make[1]: *** No rule to make target `x86-64/family12h/events', needed by
>> `distdir'. Stop.
>
> John, make sure you run autogen.sh and configure to generate the new
> makefiles needed for Suravee's new family12|14|15h stuff.

My steps were:

$ ./autogen.sh
$ ./configure --with-kernel-support
$ make
$ make distcheck

I am on a Fedora 13 system.

John

-- 
John Villalovos
Intel Corporation on-site partner engineer at Red Hat, Inc.

http://tabasco.usersys.redhat.com/

John Villalovos said the following on 12/16/10 11:40:
> Maynard Johnson said the following on 12/16/10 11:36:
>> On 12/16/2010 10:29 AM, John Villalovos wrote:
>>> Not sure if I am doing something wrong. But with the latest CVS
>>> version that I
>>> checked out yesterday, I get the following error when doing:
>>>
>>> # make distcheck
>>> <snip>
>>> make[1]: Entering directory `/home/john/sources/oprofile-test/events'
>>> make[1]: *** No rule to make target `x86-64/family12h/events', needed by
>>> `distdir'. Stop.
>>
>> John, make sure you run autogen.sh and configure to generate the new
>> makefiles needed for Suravee's new family12|14|15h stuff.
>
> My steps were:
>
> $ ./autogen.sh
> $ ./configure --with-kernel-support
> $ make
> $ make distcheck

Never mind.

It has been so long since I have used CVS that I forgot to use the '-d' 
flag when doing a 'cvs update'.

Mea Culpa!

Thanks,
John

-- 
John Villalovos
Intel Corporation on-site partner engineer at Red Hat, Inc.

http://tabasco.usersys.redhat.com/

On 12/01/2010 11:01 AM, Suravee Suthikulpanit wrote:
> 
> Will,
> 
> These files are temporary.  I would like to add the basic supports to go
> along with the kernel changes that Robert is submitting to the Linux
> kernel.  I'm planning to update these files with the full-version as
> soon as the information is public.
> 
> I didn't consider using the i386/arch_perfmon style because the
> events/unit_mask for the what consider to be "generic events" could be
> different from one architecture to another for AMD processors.
> 
> Suravee

Hi Suravee,

Are there any updates for events for the AMD Family 14h?

There is a BIOS manual for AMD Family 14h publically available on:

http://developer.amd.com/documentation/guides/pages/default.aspx

-Will