Small Device C Compiler suite

--- Alan Carvalho de Assis <acassis@...> escribió:

> Hi,
> I verify that SDCC can't compile macros if it have more than one
> assembly line wrapped by _asm/_endasm.
> 
> In example:
> 
> #define SAVE_TASK_CTX(stack_low, stack_high)                           \
> 
> {                                                                      \
> 
>     /* Disable global interrupt. */                                    \
> 
> 	_asm                                                               \
> 
>         bcf     INTCON, 6, 0                                           \
> 
>         movff   STATUS, PREINC1                                        \
> 
>         movff   WREG, PREINC1                                          \
> 
> 	_endasm	                                                           \
> 
>     /* Store the necessary registers to the stack. */                  \
>         ...
> }

Have you noticed that the _endasm avobe has not ';'. Can you verify that is that way in your code?



       
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Hi David

2007/11/6, David Lucena <yakumoklesk@...>:
>
> --- Alan Carvalho de Assis <acassis@...> escribi=F3:
>
> > Hi,
> > I verify that SDCC can't compile macros if it have more than one
> > assembly line wrapped by _asm/_endasm.
> >
> > In example:
> >
> > #define SAVE_TASK_CTX(stack_low, stack_high)                           =
\
> >
> > {                                                                      =
\
> >
> >     /* Disable global interrupt. */                                    =
\
> >
> >       _asm                                                             =
  \
> >
> >         bcf     INTCON, 6, 0                                           =
\
> >
> >         movff   STATUS, PREINC1                                        =
\
> >
> >         movff   WREG, PREINC1                                          =
\
> >
> >       _endasm                                                          =
  \
> >
> >     /* Store the necessary registers to the stack. */                  =
\
> >         ...
> > }
>
> Have you noticed that the _endasm avobe has not ';'. Can you verify that =
is that way in your code?
>

Before wrap each line I just placed the ';' but the generated code
(.asm) was wrong:

=09bcf INTCON, 6, 0 movff STATUS, PREINC1 movff WREG, PREINC1
=09movff BSR, PREINC1 movff FSR2L, PREINC1 movff FSR2H, PREINC1 movff
FSR0L, PREINC1 movff FSR0H, PREINC1 movff TBLPTRU, PREINC1 movff
TBLPTRH, PREINC1 movff TBLPTRL, PREINC1 movff TABLAT, PREINC1 movff
PRODH, PREINC1 movff PRODL, PREINC1
=09movlw 0x20 +1 clrf FSR0L, 0 clrf FSR0H, 0

As you can see the compile placed all instruction wrapped by
_asm/_endasm into a single line.

Thank you very much,

Alan

Alan Carvalho de Assis wrote:
> Hi David
>
> 2007/11/6, David Lucena <yakumoklesk@...>:
>   
>> --- Alan Carvalho de Assis <acassis@...> escribió:
>>
>>     
>>> Hi,
>>> I verify that SDCC can't compile macros if it have more than one
>>> assembly line wrapped by _asm/_endasm.
>>>
>>> In example:
>>>
>>> #define SAVE_TASK_CTX(stack_low, stack_high)                           \
>>>
>>> {                                                                      \
>>>
>>>     /* Disable global interrupt. */                                    \
>>>
>>>       _asm                                                               \
>>>
>>>         bcf     INTCON, 6, 0                                           \
>>>
>>>         movff   STATUS, PREINC1                                        \
>>>
>>>         movff   WREG, PREINC1                                          \
>>>
>>>       _endasm                                                            \
>>>
>>>     /* Store the necessary registers to the stack. */                  \
>>>         ...
>>> }
>>>       
>> Have you noticed that the _endasm avobe has not ';'. Can you verify that is that way in your code?
>>
>>     
>
> Before wrap each line I just placed the ';' but the generated code
> (.asm) was wrong:
>
> 	bcf INTCON, 6, 0 movff STATUS, PREINC1 movff WREG, PREINC1
> 	movff BSR, PREINC1 movff FSR2L, PREINC1 movff FSR2H, PREINC1 movff
> FSR0L, PREINC1 movff FSR0H, PREINC1 movff TBLPTRU, PREINC1 movff
> TBLPTRH, PREINC1 movff TBLPTRL, PREINC1 movff TABLAT, PREINC1 movff
> PRODH, PREINC1 movff PRODL, PREINC1
> 	movlw 0x20 +1 clrf FSR0L, 0 clrf FSR0H, 0
>
> As you can see the compile placed all instruction wrapped by
> _asm/_endasm into a single line.
>
>   
The C preprocessor coverts all the '\' delimited lines into a single 
line (this is the correct behavior) and pass it to the C compiler. The C 
compiler just pass everything between __asm and __endasm; directly to 
the assembler. So if the assembler doesn't know how to assemble multiple 
instructions in a single line, you have a problem. An it seems that 
gpasm is such an assembler...

I think that your workaround to put each asm line in a sparate 
__asm/__endasm; block is correct.

Borut

--- Alan Carvalho de Assis <acassis@...> escribió:

> Hi David
> 
> 2007/11/6, David Lucena <yakumoklesk@...>:
> >
> > --- Alan Carvalho de Assis <acassis@...> escribió:
> >
> > > Hi,
> > > I verify that SDCC can't compile macros if it have more than one
> > > assembly line wrapped by _asm/_endasm.
> > >
> > > In example:
> > >
> > > #define SAVE_TASK_CTX(stack_low, stack_high)                           \
> > >
> > > {                                                                      \
> > >
> > >     /* Disable global interrupt. */                                    \
> > >
> > >       _asm                                                               \
> > >
> > >         bcf     INTCON, 6, 0                                           \
> > >
> > >         movff   STATUS, PREINC1                                        \
> > >
> > >         movff   WREG, PREINC1                                          \
> > >
> > >       _endasm                                                            \
> > >
> > >     /* Store the necessary registers to the stack. */                  \
> > >         ...
> > > }
> >
> > Have you noticed that the _endasm avobe has not ';'. Can you verify that is that way in your
> code?
> >
> 
> Before wrap each line I just placed the ';' but the generated code
> (.asm) was wrong:
> 
> 	bcf INTCON, 6, 0 movff STATUS, PREINC1 movff WREG, PREINC1
> 	movff BSR, PREINC1 movff FSR2L, PREINC1 movff FSR2H, PREINC1 movff
> FSR0L, PREINC1 movff FSR0H, PREINC1 movff TBLPTRU, PREINC1 movff
> TBLPTRH, PREINC1 movff TBLPTRL, PREINC1 movff TABLAT, PREINC1 movff
> PRODH, PREINC1 movff PRODL, PREINC1
> 	movlw 0x20 +1 clrf FSR0L, 0 clrf FSR0H, 0
> 
> As you can see the compile placed all instruction wrapped by
> _asm/_endasm into a single line.
> 
> Thank you very much,
> 
> Alan
> 

Right, this is a preprocessor issue, not SDCC itself. No gnu cpp based preprocesor preserves
newlines in the macros. But I am sure that SDCC accepts more than one assembler line between _asm
and _endasm;.




       
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Borut Razem wrote:
> Alan Carvalho de Assis wrote:
>   
>> Hi David
>>
>> 2007/11/6, David Lucena <yakumoklesk@...>:
>>   
>>     
>>> --- Alan Carvalho de Assis <acassis@...> escribió:
>>>
>>>     
>>>       
>>>> Hi,
>>>> I verify that SDCC can't compile macros if it have more than one
>>>> assembly line wrapped by _asm/_endasm.
>>>>
>>>> In example:
>>>>
>>>> #define SAVE_TASK_CTX(stack_low, stack_high)                           \
>>>>
>>>> {                                                                      \
>>>>
>>>>     /* Disable global interrupt. */                                    \
>>>>
>>>>       _asm                                                               \
>>>>
>>>>         bcf     INTCON, 6, 0                                           \
>>>>
>>>>         movff   STATUS, PREINC1                                        \
>>>>
>>>>         movff   WREG, PREINC1                                          \
>>>>
>>>>       _endasm                                                            \
>>>>
>>>>     /* Store the necessary registers to the stack. */                  \
>>>>         ...
>>>> }
>>>>       
>>>>         
>>> Have you noticed that the _endasm avobe has not ';'. Can you verify that is that way in your code?
>>>
>>>     
>>>       
>> Before wrap each line I just placed the ';' but the generated code
>> (.asm) was wrong:
>>
>> 	bcf INTCON, 6, 0 movff STATUS, PREINC1 movff WREG, PREINC1
>> 	movff BSR, PREINC1 movff FSR2L, PREINC1 movff FSR2H, PREINC1 movff
>> FSR0L, PREINC1 movff FSR0H, PREINC1 movff TBLPTRU, PREINC1 movff
>> TBLPTRH, PREINC1 movff TBLPTRL, PREINC1 movff TABLAT, PREINC1 movff
>> PRODH, PREINC1 movff PRODL, PREINC1
>> 	movlw 0x20 +1 clrf FSR0L, 0 clrf FSR0H, 0
>>
>> As you can see the compile placed all instruction wrapped by
>> _asm/_endasm into a single line.
>>
>>   
>>     
> The C preprocessor coverts all the '\' delimited lines into a single 
> line (this is the correct behavior) and pass it to the C compiler. The C 
> compiler just pass everything between __asm and __endasm; directly to 
> the assembler. So if the assembler doesn't know how to assemble multiple 
> instructions in a single line, you have a problem. An it seems that 
> gpasm is such an assembler...
>
> I think that your workaround to put each asm line in a sparate 
> __asm/__endasm; block is correct.
>   
Just an additional advice:
it is safer to put the complete multi line macro in a do/while(0) loop:

#define SAVE_TASK_CTX(stack_low, stack_high)                           \
do {                                                                   \
    /* Disable global interrupt. */                                    \
	_asm                                                           \
        bcf     INTCON, 6, 0                                           \
	_endasm;                                                       \
	_asm                                                           \
        movff   STATUS, PREINC1                                        \
	_endasm;                                                       \
	_asm                                                           \
        movff   WREG, PREINC1                                          \
	_endasm;                                                       \
    /* Store the necessary registers to the stack. */                  \
        ...
} while (0)


so that the following cases work correctly:

if (...)
  SAVE_TASK_CTX(stack_low, stack_high);


if (...)
  SAVE_TASK_CTX(stack_low, stack_high);
else
  ...

Borut

Hi David and Borut,

2007/11/6, David Lucena <yakumoklesk@...>:
>
> Right, this is a preprocessor issue, not SDCC itself. No gnu cpp based preprocesor preserves
> newlines in the macros. But I am sure that SDCC accepts more than one assembler line between _asm
> and _endasm;.
>

Thank you for these information.

I think my ugly work around will work anyway! :-D

But I'm unhappy because C18 compile the above code but SDCC no!

Cheers,

Alan

Hi Borut,

2007/11/6, Borut Razem <borut.razem@...>:
>
> #define SAVE_TASK_CTX(stack_low, stack_high)                           \
> do {                                                                   \
>     /* Disable global interrupt. */                                    \
>         _asm                                                           \
>         bcf     INTCON, 6, 0                                           \
>         _endasm;                                                       \
>         _asm                                                           \
>         movff   STATUS, PREINC1                                        \
>         _endasm;                                                       \
>         _asm                                                           \
>         movff   WREG, PREINC1                                          \
>         _endasm;                                                       \
>     /* Store the necessary registers to the stack. */                  \
>         ...
> } while (0)
>
>
> so that the following cases work correctly:
>
> if (...)
>   SAVE_TASK_CTX(stack_low, stack_high);
>
>
> if (...)
>   SAVE_TASK_CTX(stack_low, stack_high);
> else
>   ...
>

Yes. I saw this tips at kernelnewbies.org some years ago. I'm
wondering because the original code works, see the pro_man.c from
PICos18:

  if (kernelState & USER)
    SAVE_TASK_CTX(stack_low, stack_high);
  SCHEDULE;

Very strange!

Cheers,

> Borut
>

Alan

Alan Carvalho de Assis wrote:
> Hi Borut,
>
> 2007/11/6, Borut Razem <borut.razem@...>:
>   
>> #define SAVE_TASK_CTX(stack_low, stack_high)                           \
>> do {                                                                   \
>>     /* Disable global interrupt. */                                    \
>>         _asm                                                           \
>>         bcf     INTCON, 6, 0                                           \
>>         _endasm;                                                       \
>>         _asm                                                           \
>>         movff   STATUS, PREINC1                                        \
>>         _endasm;                                                       \
>>         _asm                                                           \
>>         movff   WREG, PREINC1                                          \
>>         _endasm;                                                       \
>>     /* Store the necessary registers to the stack. */                  \
>>         ...
>> } while (0)
>>
>>
>> so that the following cases work correctly:
>>
>> if (...)
>>   SAVE_TASK_CTX(stack_low, stack_high);
>>
>>
>> if (...)
>>   SAVE_TASK_CTX(stack_low, stack_high);
>> else
>>   ...
>>
>>     
>
> Yes. I saw this tips at kernelnewbies.org some years ago. I'm
> wondering because the original code works, see the pro_man.c from
> PICos18:
>
>   if (kernelState & USER)
>     SAVE_TASK_CTX(stack_low, stack_high);
>   SCHEDULE;
>
> Very strange!
>
> Cheers,
>
>   
Your original code wouldn't work in the second example:

if (...)
  SAVE_TASK_CTX(stack_low, stack_high);
else
  ...

because there is a semicolon (an additional null statement) before else.

Borut

Hi Borut,

2007/11/6, Borut Razem <borut.razem@...>:
>
> because there is a semicolon (an additional null statement) before else.
>

Hum, it make sense. Since _asm/_endasm into C18 don't needs ';' then
it at end of macro calling solve the problem.

> Borut
>

Thank you Borut.

Now I'm facing problems related to .asm creation.

In example:
pro_man.asm:1190: error: Symbol not previously defined (FSR2H)

This same don't appear when using FSR2L, looking at the asm code I verifyied it:

;--------------------------------------------------------
;	Equates to used internal registers
;--------------------------------------------------------
...
FSR2L	equ	0xfd9

There is FSR2L declaration but don't FSR2H. Do you know how to solve it?

Cheers,

Alan

Alan Carvalho de Assis schrieb:
> Hi David and Borut,
> 
> 2007/11/6, David Lucena <yakumoklesk@...>:
>> Right, this is a preprocessor issue, not SDCC itself. No gnu cpp based preprocesor preserves
>> newlines in the macros. But I am sure that SDCC accepts more than one assembler line between _asm
>> and _endasm;.
>>
> 
> Thank you for these information.
> 
> I think my ugly work around will work anyway! :-D
> 
> But I'm unhappy because C18 compile the above code but SDCC no!

Does #pragma preproc_asm work for you?
(section 3.18)

Greetings,
Frieder

> Hi,
> I verify that SDCC can't compile macros if it have more than one
> assembly line wrapped by _asm/_endasm.
>
> In example:
>
I have whole lot of code for ADC and soft serial port between _asm and 
_endasm;
I never faced problem.
I am using old version of SDCC.

Warm Regards,

Mukund Deshmukh,
Beta Computronics Pvt Ltd.
10/1 IT Park, Parsodi,
Nagpur -440022 India.
Web site - http://betacomp.com

Hi Frieder,

2007/11/6, Frieder Ferlemann <frieder.ferlemann@...>:
>
> Does #pragma preproc_asm work for you?
> (section 3.18)
>

Perfect, it works fine! A clean solution.

> Greetings,
> Frieder
>

Cheers,

Alan

--- Frieder Ferlemann <frieder.ferlemann@...> escribió:

> Alan Carvalho de Assis schrieb:
> > Hi David and Borut,
> > 
> > 2007/11/6, David Lucena <yakumoklesk@...>:
> >> Right, this is a preprocessor issue, not SDCC itself. No gnu cpp based preprocesor preserves
> >> newlines in the macros. But I am sure that SDCC accepts more than one assembler line between
> _asm
> >> and _endasm;.
> >>
> > 
> > Thank you for these information.
> > 
> > I think my ugly work around will work anyway! :-D
> > 
> > But I'm unhappy because C18 compile the above code but SDCC no!
> 
> Does #pragma preproc_asm work for you?
> (section 3.18)
> 
> Greetings,
> Frieder
> 

Nice note. I didn't find yesterday in SDCC manual, but now that you pointed it, I found it and is
a nice feature.


       
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Hi Mukund,

2007/11/7, Mukund Deshmukh <mukund.deshmukh@...>:
> I have whole lot of code for ADC and soft serial port between _asm and
> _endasm;
> I never faced problem.
> I am using old version of SDCC.
>

Hmm, are you defining MACROS using multiple assembly lines?

Try it:

#define CLI  \
{                                                                      \
    /* Disable global interrupt. */                                    \
        _asm                                                               \
        bcf     INTCON, 6, 0                                           \
        movff   STATUS, PREINC1                                        \
        movff   WREG, PREINC1                                          \
        _endasm;                 \
}

Anyway Frieder show me an elegant way to solve this problem.

> Warm Regards,
>
> Mukund Deshmukh,
> Beta Computronics Pvt Ltd.
> 10/1 IT Park, Parsodi,
> Nagpur -440022 India.
> Web site - http://betacomp.com
>
>

Cheers,

Alan

Hi Alan,

Alan Carvalho de Assis schrieb:
> Hi Mukund,
> 
> 2007/11/7, Mukund Deshmukh <mukund.deshmukh@...>:
>> I have whole lot of code for ADC and soft serial port between _asm and
>> _endasm;

Mukund's mail seems to have arrived with a delay of 4 days on the list.


Is he the only one who suffers these _exorbitant_ delays or are
others (or other continents) also affected?



Citing from the mail header as I received it here:


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Who is delaying
(from 06 Nov 2007 20:11:31 -0800
   to 11 Nov 2007 11:33:09 -0800 (PST))
and why?
And if he/she/it has a reason, whom has he/she/it told before?


Greetings,
Frieder