I was reading about the 18f2550 today. It is a 28 pin device with
embedded USB 2.0 functionality.
Single unit price about $9.25 US. Fits the same pinout as the 18f252 but
runs at 48MHz. Additionally,
it has 8 new instructions and a revised page 0 mapping that is enabled
via the config words. The new
addressing modes allow offsets from the FSR registers. It would appear
that FSR2 is intended as
the Stack Pointer vs sdcc FSR1. It also has a hacked addressing mode
where memory locations
below 0x5F become offset to FSR2. I'm not sure if FSR2 should be the SP,
FP or a general purpose
80 byte page pointer. Regardless, being able to directly access the
stack frame will be a great benefit
to a compiler that can exploit it.
MicroChip documentation indicates that MPASM and C18 currently support
the new modes.