> The alternating 0x555/0xaaa patterns sent out on the address lines
> can cause all kind of confusion ;) - for example, on most CPU/SoC
> chips, the CPU _byte_ addresses A0..Ax come out on pins named A0..Ax;
> but some flash chips with only 16-bit data bus expect _word_
> addresses on their A0..Ax and thus the flash A0 is usually aligned
> with CPU A1. Then, in order to have the 0xAAA pattern on the flash
> address input, the CPU bus has to actually output 0x1554.
I second that. My understanding is that the API for bus_write() and
bus_read() uses byte addresses, even if the attached component has a
16-bit or 32-bit data bus. At least this is how readmem treats the memory.
However, this is not handled consistently in every place. E.g. jedec.c
doesn't care about this fact and generates simply the 0x555/0xaaa
patterns for flash detection. The actual flash drivers in amd.c then
shift patterns according to the bus width.