On Sat, Sep 11, 2004 at 11:52:25PM +0300, Juho Snellman wrote:
> Attached is a port of Rob MacLachlan's old (as in "apparently predates
> the CMUCL CVS repository") loop dominator code. Also included is a
> modified register allocator which:
Here's a second attempt which:
* Fixes the 20% slowdown in compilation speed on non-x86.
* No longer has the x86 kludge for packing TNs in the
base-char-register SC first. It was ugly, and Christophe pointed
out that base-char-register will be (has been?) eliminated in
* Disables the more expensive parts of the improved register
allocator unless (> speed compile-speed). There's one conceptual
problem with this; the current implementation will turn on the
optimization for the whole IR2 component if any of the component's
blocks have (> speed compile-speed). Thus it's possible for a
declaration to have a minor effect outside it's scope. I feel that
this is acceptable since there's no effect on the semantics of
the generated code, just a speed vs. compilation speed tradeoff.
I think a version that obeys strict scoping would be possible but
If there are no objections, I'm hoping to commit this sometime soon
(probably next weekend).