OpenOCD - Open On-Chip Debugger

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[openocd-svn] Main OpenOCD repository branch, master, updated. v0.4.0-820-g0c1ebf2

From: Øyvind Harboe <gowinex@us...> - 2011-03-31 23:51

This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".

The branch, master has been updated
       via  0c1ebf2673ef02c5fef7677cbf09d4ad4fa3c533 (commit)
       via  83ab5ad2408c7d67ea490986f887c432f229e0ef (commit)
       via  667c65552e56aeb4d08aa1ec8b1fb9fc29117201 (commit)
      from  e1f5055bb089d1f854777da1d200e7551cdd3a4f (commit)

Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
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- Log -----------------------------------------------------------------
commit 0c1ebf2673ef02c5fef7677cbf09d4ad4fa3c533
Author: Ãyvind Harboe <oyvind.harboe@...>
Date:   Thu Mar 31 23:46:32 2011 +0200

    mips: mips32_pracc_exec error propagation fixes
    
    Signed-off-by: Ãyvind Harboe <oyvind.harboe@...>

diff --git a/src/target/mips32_pracc.c b/src/target/mips32_pracc.c
index 0ee5715..54274ab 100644
--- a/src/target/mips32_pracc.c
+++ b/src/target/mips32_pracc.c
@@ -446,7 +446,7 @@ static int mips32_pracc_read_mem16(struct mips_ejtag *ejtag_info, uint32_t addr,
 	uint32_t *param_out = malloc(count * sizeof(uint32_t));
 	int i;
 
-//	int retval;
+	int retval = ERROR_OK;
 	int blocksize;
 	int bytesread;
 	uint32_t param_in[2];
@@ -462,7 +462,7 @@ static int mips32_pracc_read_mem16(struct mips_ejtag *ejtag_info, uint32_t addr,
 		param_in[0] = addr;
 		param_in[1] = blocksize;
 
-		mips32_pracc_exec(ejtag_info, ARRAY_SIZE(code), code, \
+		retval = mips32_pracc_exec(ejtag_info, ARRAY_SIZE(code), code,
 			ARRAY_SIZE(param_in), param_in, count, param_out, 1);
 
 //		count -= blocksize;
@@ -477,7 +477,7 @@ static int mips32_pracc_read_mem16(struct mips_ejtag *ejtag_info, uint32_t addr,
 
 	free(param_out);
 
-	return ERROR_OK;
+	return retval;
 }
 
 static int mips32_pracc_read_mem8(struct mips_ejtag *ejtag_info, uint32_t addr, int count, uint8_t *buf)
@@ -523,7 +523,7 @@ static int mips32_pracc_read_mem8(struct mips_ejtag *ejtag_info, uint32_t addr,
 	uint32_t *param_out = malloc(count * sizeof(uint32_t));
 	int i;
 
-//	int retval;
+	int retval = ERROR_OK;
 	int blocksize;
 	int bytesread;
 	uint32_t param_in[2];
@@ -539,7 +539,7 @@ static int mips32_pracc_read_mem8(struct mips_ejtag *ejtag_info, uint32_t addr,
 		param_in[0] = addr;
 		param_in[1] = blocksize;
 
-		mips32_pracc_exec(ejtag_info, ARRAY_SIZE(code), code, \
+		retval = mips32_pracc_exec(ejtag_info, ARRAY_SIZE(code), code,
 			ARRAY_SIZE(param_in), param_in, count, param_out, 1);
 
 //		count -= blocksize;
@@ -554,7 +554,7 @@ static int mips32_pracc_read_mem8(struct mips_ejtag *ejtag_info, uint32_t addr,
 
 	free(param_out);
 
-	return ERROR_OK;
+	return retval;
 }
 
 int mips32_pracc_write_mem(struct mips_ejtag *ejtag_info, uint32_t addr, int size, int count, void *buf)
@@ -616,12 +616,13 @@ static int mips32_pracc_write_mem32(struct mips_ejtag *ejtag_info, uint32_t addr
 
 	memcpy(&param_in[2], buf, count * sizeof(uint32_t));
 
-	mips32_pracc_exec(ejtag_info, ARRAY_SIZE(code), code, \
+	int retval;
+	retval = mips32_pracc_exec(ejtag_info, ARRAY_SIZE(code), code,
 		count + 2, param_in, 0, NULL, 1);
 
 	free(param_in);
 
-	return ERROR_OK;
+	return retval;
 }
 
 static int mips32_pracc_write_u32(struct mips_ejtag *ejtag_info, uint32_t addr, uint32_t *buf)
@@ -650,10 +651,8 @@ static int mips32_pracc_write_u32(struct mips_ejtag *ejtag_info, uint32_t addr,
 	param_in[0] = addr;
 	param_in[1] = *buf;
 
-	mips32_pracc_exec(ejtag_info, ARRAY_SIZE(code), code, \
+	return mips32_pracc_exec(ejtag_info, ARRAY_SIZE(code), code,
 		ARRAY_SIZE(param_in), param_in, 0, NULL, 1);
-
-	return ERROR_OK;
 }
 
 static int mips32_pracc_write_mem16(struct mips_ejtag *ejtag_info, uint32_t addr, int count, uint16_t *buf)
@@ -706,12 +705,13 @@ static int mips32_pracc_write_mem16(struct mips_ejtag *ejtag_info, uint32_t addr
 		param_in[i + 2] = buf[i];
 	}
 
-	mips32_pracc_exec(ejtag_info, ARRAY_SIZE(code), code, \
+	int retval;
+	retval = mips32_pracc_exec(ejtag_info, ARRAY_SIZE(code), code,
 		count + 2, param_in, 0, NULL, 1);
 
 	free(param_in);
 
-	return ERROR_OK;
+	return retval;
 }
 
 static int mips32_pracc_write_mem8(struct mips_ejtag *ejtag_info, uint32_t addr, int count, uint8_t *buf)
@@ -765,7 +765,7 @@ static int mips32_pracc_write_mem8(struct mips_ejtag *ejtag_info, uint32_t addr,
 		param_in[i + 2] = buf[i];
 	}
 
-	retval = mips32_pracc_exec(ejtag_info, ARRAY_SIZE(code), code, \
+	retval = mips32_pracc_exec(ejtag_info, ARRAY_SIZE(code), code,
 		count + 2, param_in, 0, NULL, 1);
 
 	free(param_in);
@@ -837,7 +837,7 @@ int mips32_pracc_write_regs(struct mips_ejtag *ejtag_info, uint32_t *regs)
 
 	int retval;
 
-	retval = mips32_pracc_exec(ejtag_info, ARRAY_SIZE(code), code, \
+	retval = mips32_pracc_exec(ejtag_info, ARRAY_SIZE(code), code,
 			MIPS32NUMCOREREGS, regs, 0, NULL, 1);
 
 	return retval;
@@ -912,7 +912,7 @@ int mips32_pracc_read_regs(struct mips_ejtag *ejtag_info, uint32_t *regs)
 
 	int retval;
 
-	retval = mips32_pracc_exec(ejtag_info, ARRAY_SIZE(code), code, \
+	retval = mips32_pracc_exec(ejtag_info, ARRAY_SIZE(code), code,
 		0, NULL, MIPS32NUMCOREREGS, regs, 1);
 
 	return retval;
diff --git a/src/target/mips_ejtag.c b/src/target/mips_ejtag.c
index f9eaef1..9df8a02 100644
--- a/src/target/mips_ejtag.c
+++ b/src/target/mips_ejtag.c
@@ -162,10 +162,8 @@ static int mips_ejtag_step_enable(struct mips_ejtag *ejtag_info)
 			MIPS32_MFC0(1,31,0),			/* move COP0 DeSave to $1 */
 	};
 
-	mips32_pracc_exec(ejtag_info, ARRAY_SIZE(code), code, \
-		0, NULL, 0, NULL, 1);
-
-	return ERROR_OK;
+	return mips32_pracc_exec(ejtag_info, ARRAY_SIZE(code), code,
+			0, NULL, 0, NULL, 1);
 }
 
 static int mips_ejtag_step_disable(struct mips_ejtag *ejtag_info)
@@ -187,10 +185,8 @@ static int mips_ejtag_step_disable(struct mips_ejtag *ejtag_info)
 			MIPS32_MFC0(15,31,0),							/* move COP0 DeSave to $15 */
 	};
 
-	mips32_pracc_exec(ejtag_info, ARRAY_SIZE(code), code, \
+	return mips32_pracc_exec(ejtag_info, ARRAY_SIZE(code), code,
 		0, NULL, 0, NULL, 1);
-
-	return ERROR_OK;
 }
 
 int mips_ejtag_config_step(struct mips_ejtag *ejtag_info, int enable_step)
@@ -228,9 +224,7 @@ int mips_ejtag_exit_debug(struct mips_ejtag *ejtag_info)
 	inst = MIPS32_DRET;
 
 	/* execute our dret instruction */
-	mips32_pracc_exec(ejtag_info, 1, &inst, 0, NULL, 0, NULL, 0);
-
-	return ERROR_OK;
+	return mips32_pracc_exec(ejtag_info, 1, &inst, 0, NULL, 0, NULL, 0);
 }
 
 int mips_ejtag_read_debug(struct mips_ejtag *ejtag_info, uint32_t* debug_reg)
@@ -252,10 +246,8 @@ int mips_ejtag_read_debug(struct mips_ejtag *ejtag_info, uint32_t* debug_reg)
 			MIPS32_MFC0(15,31,0),							/* move COP0 DeSave to $15 */
 	};
 
-	mips32_pracc_exec(ejtag_info, ARRAY_SIZE(code), code, \
+	return mips32_pracc_exec(ejtag_info, ARRAY_SIZE(code), code,
 		0, NULL, 1, debug_reg, 1);
-
-	return ERROR_OK;
 }
 
 int mips_ejtag_init(struct mips_ejtag *ejtag_info)

commit 83ab5ad2408c7d67ea490986f887c432f229e0ef
Author: Ãyvind Harboe <oyvind.harboe@...>
Date:   Thu Mar 31 23:39:10 2011 +0200

    mips: mips_ejtag_get_impcode error propagation added
    
    Signed-off-by: Ãyvind Harboe <oyvind.harboe@...>

diff --git a/src/target/mips_ejtag.c b/src/target/mips_ejtag.c
index 8e1404f..f9eaef1 100644
--- a/src/target/mips_ejtag.c
+++ b/src/target/mips_ejtag.c
@@ -261,8 +261,11 @@ int mips_ejtag_read_debug(struct mips_ejtag *ejtag_info, uint32_t* debug_reg)
 int mips_ejtag_init(struct mips_ejtag *ejtag_info)
 {
 	uint32_t ejtag_version;
+	int retval;
 
-	mips_ejtag_get_impcode(ejtag_info, &ejtag_info->impcode);
+	retval = mips_ejtag_get_impcode(ejtag_info, &ejtag_info->impcode);
+	if (retval != ERROR_OK)
+		return retval;
 	LOG_DEBUG("impcode: 0x%8.8" PRIx32 "", ejtag_info->impcode);
 
 	/* get ejtag version */
diff --git a/src/target/mips_m4k.c b/src/target/mips_m4k.c
index 3a79273..0508c35 100644
--- a/src/target/mips_m4k.c
+++ b/src/target/mips_m4k.c
@@ -940,7 +940,9 @@ static int mips_m4k_examine(struct target *target)
 
 	if (!target_was_examined(target))
 	{
-		mips_ejtag_get_idcode(ejtag_info, &idcode);
+		retval = mips_ejtag_get_idcode(ejtag_info, &idcode);
+		if (retval != ERROR_OK)
+			return retval;
 		ejtag_info->idcode = idcode;
 
 		if (((idcode >> 1) & 0x7FF) == 0x29)

commit 667c65552e56aeb4d08aa1ec8b1fb9fc29117201
Author: Ãyvind Harboe <oyvind.harboe@...>
Date:   Thu Mar 31 23:31:37 2011 +0200

    mips: fix mips_ejtag_set_instr error handling
    
    this fn does not fail, it queues data.
    
    Signed-off-by: Ãyvind Harboe <oyvind.harboe@...>

diff --git a/src/target/mips_ejtag.c b/src/target/mips_ejtag.c
index 6ce702f..8e1404f 100644
--- a/src/target/mips_ejtag.c
+++ b/src/target/mips_ejtag.c
@@ -28,13 +28,12 @@
 #include "mips32.h"
 #include "mips_ejtag.h"
 
-int mips_ejtag_set_instr(struct mips_ejtag *ejtag_info, int new_instr)
+void mips_ejtag_set_instr(struct mips_ejtag *ejtag_info, int new_instr)
 {
 	struct jtag_tap *tap;
 
 	tap = ejtag_info->tap;
-	if (tap == NULL)
-		return ERROR_FAIL;
+	assert(tap != NULL);
 
 	if (buf_get_u32(tap->cur_instr, 0, tap->ir_length) != (uint32_t)new_instr)
 	{
@@ -48,8 +47,6 @@ int mips_ejtag_set_instr(struct mips_ejtag *ejtag_info, int new_instr)
 
 		jtag_add_ir_scan(tap, &field, TAP_IDLE);
 	}
-
-	return ERROR_OK;
 }
 
 int mips_ejtag_get_idcode(struct mips_ejtag *ejtag_info, uint32_t *idcode)
@@ -98,9 +95,8 @@ int mips_ejtag_drscan_32(struct mips_ejtag *ejtag_info, uint32_t *data)
 {
 	struct jtag_tap *tap;
 	tap  = ejtag_info->tap;
+	assert(tap != NULL);
 
-	if (tap == NULL)
-		return ERROR_FAIL;
 	struct scan_field field;
 	uint8_t t[4], r[4];
 	int retval;
@@ -129,9 +125,8 @@ int mips_ejtag_drscan_8(struct mips_ejtag *ejtag_info, uint32_t *data)
 {
 	struct jtag_tap *tap;
 	tap  = ejtag_info->tap;
+	assert(tap != NULL);
 
-	if (tap == NULL)
-		return ERROR_FAIL;
 	struct scan_field field;
 	uint8_t t[4] = {0, 0, 0, 0}, r[4];
 	int retval;
@@ -219,7 +214,10 @@ int mips_ejtag_enter_debug(struct mips_ejtag *ejtag_info)
 	mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
 	LOG_DEBUG("ejtag_ctrl: 0x%8.8" PRIx32 "", ejtag_ctrl);
 	if ((ejtag_ctrl & EJTAG_CTRL_BRKST) == 0)
-		LOG_DEBUG("Failed to enter Debug Mode!");
+	{
+		LOG_ERROR("Failed to enter Debug Mode!");
+		return ERROR_FAIL;
+	}
 
 	return ERROR_OK;
 }
@@ -311,9 +309,7 @@ int mips_ejtag_fastdata_scan(struct mips_ejtag *ejtag_info, int write_t, uint32_
 {
 	struct jtag_tap *tap;
 	tap = ejtag_info->tap;
-
-	if (tap == NULL)
-		return ERROR_FAIL;
+	assert(tap != NULL);
 
 	struct scan_field fields[2];
 	uint8_t spracc = 0;
diff --git a/src/target/mips_ejtag.h b/src/target/mips_ejtag.h
index 0db0504..63b6093 100644
--- a/src/target/mips_ejtag.h
+++ b/src/target/mips_ejtag.h
@@ -131,7 +131,7 @@ struct mips_ejtag
 	int fast_access_save;
 };
 
-int mips_ejtag_set_instr(struct mips_ejtag *ejtag_info,
+void mips_ejtag_set_instr(struct mips_ejtag *ejtag_info,
 		int new_instr);
 int mips_ejtag_enter_debug(struct mips_ejtag *ejtag_info);
 int mips_ejtag_exit_debug(struct mips_ejtag *ejtag_info);

-----------------------------------------------------------------------

Summary of changes:
 src/target/mips32_pracc.c |   32 ++++++++++++++++----------------
 src/target/mips_ejtag.c   |   45 ++++++++++++++++++---------------------------
 src/target/mips_ejtag.h   |    2 +-
 src/target/mips_m4k.c     |    4 +++-
 4 files changed, 38 insertions(+), 45 deletions(-)


hooks/post-receive
-- 
Main OpenOCD repository

[openocd-svn] Main OpenOCD repository branch, master, updated. v0.4.0-817-ge1f5055

From: Øyvind Harboe <gowinex@us...> - 2011-03-31 23:12

This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".

The branch, master has been updated
       via  e1f5055bb089d1f854777da1d200e7551cdd3a4f (commit)
      from  f169f86bd10c4dfdab6088e233647bb6d42b5c26 (commit)

Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.

- Log -----------------------------------------------------------------
commit e1f5055bb089d1f854777da1d200e7551cdd3a4f
Author: Ãyvind Harboe <oyvind.harboe@...>
Date:   Thu Mar 31 23:07:55 2011 +0200

    mips: fix error handling for jtag_execute_queue()
    
    Signed-off-by: Ãyvind Harboe <oyvind.harboe@...>

diff --git a/src/target/mips32_pracc.c b/src/target/mips32_pracc.c
index 9a9b427..0ee5715 100644
--- a/src/target/mips32_pracc.c
+++ b/src/target/mips32_pracc.c
@@ -176,9 +176,7 @@ static int mips32_pracc_exec_read(struct mips32_pracc_context *ctx, uint32_t add
 	mips_ejtag_drscan_32(ctx->ejtag_info, &ejtag_ctrl);
 
 	jtag_add_clocks(5);
-	jtag_execute_queue();
-
-	return ERROR_OK;
+	return jtag_execute_queue();
 }
 
 static int mips32_pracc_exec_write(struct mips32_pracc_context *ctx, uint32_t address)
@@ -196,7 +194,7 @@ static int mips32_pracc_exec_write(struct mips32_pracc_context *ctx, uint32_t ad
 	mips_ejtag_drscan_32(ctx->ejtag_info, &ejtag_ctrl);
 
 	jtag_add_clocks(5);
-	jtag_execute_queue();
+	return jtag_execute_queue();
 
 	if ((address >= MIPS32_PRACC_PARAM_IN)
 		&& (address <= MIPS32_PRACC_PARAM_IN + ctx->num_iparam * 4))
diff --git a/src/target/mips_ejtag.c b/src/target/mips_ejtag.c
index e381063..6ce702f 100644
--- a/src/target/mips_ejtag.c
+++ b/src/target/mips_ejtag.c
@@ -64,11 +64,12 @@ int mips_ejtag_get_idcode(struct mips_ejtag *ejtag_info, uint32_t *idcode)
 
 	jtag_add_dr_scan(ejtag_info->tap, 1, &field, TAP_IDLE);
 
-	if (jtag_execute_queue() != ERROR_OK)
+	int retval;
+	if ((retval = jtag_execute_queue()) != ERROR_OK)
 	{
 		LOG_ERROR("register read failed");
+		return retval;
 	}
-
 	return ERROR_OK;
 }
 
@@ -84,11 +85,12 @@ static int mips_ejtag_get_impcode(struct mips_ejtag *ejtag_info, uint32_t *impco
 
 	jtag_add_dr_scan(ejtag_info->tap, 1, &field, TAP_IDLE);
 
-	if (jtag_execute_queue() != ERROR_OK)
+	int retval;
+	if ((retval = jtag_execute_queue()) != ERROR_OK)
 	{
 		LOG_ERROR("register read failed");
+		return retval;
 	}
-
 	return ERROR_OK;
 }
 

-----------------------------------------------------------------------

Summary of changes:
 src/target/mips32_pracc.c |    6 ++----
 src/target/mips_ejtag.c   |   10 ++++++----
 2 files changed, 8 insertions(+), 8 deletions(-)


hooks/post-receive
-- 
Main OpenOCD repository

[openocd-svn] Main OpenOCD repository branch, master, updated. v0.4.0-816-gf169f86

From: Øyvind Harboe <gowinex@us...> - 2011-03-31 18:49

This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".

The branch, master has been updated
       via  f169f86bd10c4dfdab6088e233647bb6d42b5c26 (commit)
      from  8d338f3296d87f3b0aa40b6f60a0ca393e435b36 (commit)

Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.

- Log -----------------------------------------------------------------
commit f169f86bd10c4dfdab6088e233647bb6d42b5c26
Author: Ãyvind Harboe <oyvind.harboe@...>
Date:   Thu Mar 31 18:46:14 2011 +0200

    xscale: fix gaffe in phys write
    
    it would *read* instead of *write* to memory
    when the MMU was disabled.
    
    Signed-off-by: Ãyvind Harboe <oyvind.harboe@...>

diff --git a/src/target/xscale.c b/src/target/xscale.c
index 9511be0..d1e33b7 100644
--- a/src/target/xscale.c
+++ b/src/target/xscale.c
@@ -2022,7 +2022,7 @@ static int xscale_write_phys_memory(struct target *target, uint32_t address,
 
 	/* with MMU inactive, there are only physical addresses */
 	if (!xscale->armv4_5_mmu.mmu_enabled)
-		return xscale_read_memory(target, address, size, count, buffer);
+		return xscale_write_memory(target, address, size, count, buffer);
 
 	/** \todo: provide a non-stub implementation of this routine. */
 	LOG_ERROR("%s: %s is not implemented.  Disable MMU?",

-----------------------------------------------------------------------

Summary of changes:
 src/target/xscale.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)


hooks/post-receive
-- 
Main OpenOCD repository

[openocd-svn] Main OpenOCD repository branch, master, updated. v0.4.0-815-g8d338f3

From: Øyvind Harboe <gowinex@us...> - 2011-03-31 09:32

This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "Main OpenOCD repository".

The branch, master has been updated
       via  8d338f3296d87f3b0aa40b6f60a0ca393e435b36 (commit)
       via  b75bdb7b0428add602c2e4beb7e059da5d4a6c95 (commit)
      from  ac6f8f9616aada403c52254738096ec43888ca42 (commit)

Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.

- Log -----------------------------------------------------------------
commit 8d338f3296d87f3b0aa40b6f60a0ca393e435b36
Author: Ãyvind Harboe <oyvind.harboe@...>
Date:   Wed Mar 30 13:34:50 2011 +0200

    cortex-a: use -dbgbase option
    
    Signed-off-by: Ãyvind Harboe <oyvind.harboe@...>

diff --git a/src/target/cortex_a.c b/src/target/cortex_a.c
index 82f719a..5ff6bac 100644
--- a/src/target/cortex_a.c
+++ b/src/target/cortex_a.c
@@ -1861,7 +1861,7 @@ static int cortex_a8_examine_first(struct target *target)
 	int i;
 	int retval = ERROR_OK;
 	uint32_t didr, ctypr, ttypr, cpuid;
-	uint32_t dbgbase, apid;
+	uint32_t dbgbase;
 
 	/* We do one extra read to ensure DAP is configured,
 	 * we call ahbap_debugport_init(swjdp) instead
@@ -1870,10 +1870,17 @@ static int cortex_a8_examine_first(struct target *target)
 	if (retval != ERROR_OK)
 		return retval;
 
-	/* Get ROM Table base */
-	retval = dap_get_debugbase(swjdp, 1, &dbgbase, &apid);
-	if (retval != ERROR_OK)
-		return retval;
+	if (!target->dbgbase_set)
+	{
+		/* Get ROM Table base */
+		uint32_t apid;
+		retval = dap_get_debugbase(swjdp, 1, &dbgbase, &apid);
+		if (retval != ERROR_OK)
+			return retval;
+	} else
+	{
+		dbgbase = target->dbgbase;
+	}
 
 	/* Lookup 0x15 -- Processor DAP */
 	retval = dap_lookup_cs_component(swjdp, 1, dbgbase, 0x15,

commit b75bdb7b0428add602c2e4beb7e059da5d4a6c95
Author: Ãyvind Harboe <oyvind.harboe@...>
Date:   Wed Mar 30 13:32:47 2011 +0200

    target: add -dbgbase option to target configuration
    
    Really a Cortex-A specific option, but there is no
    system in place to support target specific options
    currently and there has been no need for such a system
    until now.
    
    Signed-off-by: Ãyvind Harboe <oyvind.harboe@...>

diff --git a/src/target/target.c b/src/target/target.c
index 00d4309..df38c83 100644
--- a/src/target/target.c
+++ b/src/target/target.c
@@ -3703,6 +3703,7 @@ enum target_cfg_param {
 	TCFG_VARIANT,
 	TCFG_COREID,
 	TCFG_CHAIN_POSITION,
+	TCFG_DBGBASE,
 };
 
 static Jim_Nvp nvp_config_opts[] = {
@@ -3716,6 +3717,7 @@ static Jim_Nvp nvp_config_opts[] = {
 	{ .name = "-variant",          .value = TCFG_VARIANT },
 	{ .name = "-coreid",           .value = TCFG_COREID },
 	{ .name = "-chain-position",   .value = TCFG_CHAIN_POSITION },
+	{ .name = "-dbgbase",          .value = TCFG_DBGBASE },
 	{ .name = NULL, .value = -1 }
 };
 
@@ -4006,6 +4008,22 @@ static int target_configure(Jim_GetOptInfo *goi, struct target *target)
 			Jim_SetResultString(goi->interp, target->tap->dotted_name, -1);
 			/* loop for more e*/
 			break;
+		case TCFG_DBGBASE:
+			if (goi->isconfigure) {
+				e = Jim_GetOpt_Wide(goi, &w);
+				if (e != JIM_OK) {
+					return e;
+				}
+				target->dbgbase = (uint32_t)w;
+				target->dbgbase_set = true;
+			} else {
+				if (goi->argc != 0) {
+					goto no_params;
+				}
+			}
+			Jim_SetResult(goi->interp, Jim_NewIntObj(goi->interp, target->dbgbase));
+			/* loop for more */
+			break;
 		}
 	} /* while (goi->argc) */
 
diff --git a/src/target/target.h b/src/target/target.h
index d6e7431..32fa87a 100644
--- a/src/target/target.h
+++ b/src/target/target.h
@@ -155,6 +155,11 @@ struct target
 										 * lots of halted/resumed info when stepping in debugger. */
 	bool halt_issued;					/* did we transition to halted state? */
 	long long halt_issued_time;			/* Note time when halt was issued */
+
+	bool dbgbase_set;					/* By default the debug base is not set */
+	uint32_t dbgbase;					/* Really a Cortex-A specific option, but there is no
+	 	 	 	 	 	 	 	 	 	   system in place to support target specific options
+	 	 	 	 	 	 	 	 	 	   currently. */
 };
 
 /** Returns the instance-specific name of the specified target. */

-----------------------------------------------------------------------

Summary of changes:
 src/target/cortex_a.c |   17 ++++++++++++-----
 src/target/target.c   |   18 ++++++++++++++++++
 src/target/target.h   |    5 +++++
 3 files changed, 35 insertions(+), 5 deletions(-)


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