LinuxSH

Update of /cvsroot/linuxsh/linux/arch/sh/drivers/dma
In directory sc8-pr-cvs1.sourceforge.net:/tmp/cvs-serv19303/arch/sh/drivers/dma

Modified Files:
	dma-g2.c dma-pvr2.c 
Log Message:
Update G2 and PVR2 DMA drivers to comply with recent API changes.



Index: dma-g2.c
===================================================================
RCS file: /cvsroot/linuxsh/linux/arch/sh/drivers/dma/dma-g2.c,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -d -r1.1 -r1.2
--- dma-g2.c	16 Sep 2003 17:42:55 -0000	1.1
+++ dma-g2.c	29 Jul 2004 03:11:00 -0000	1.2
@@ -3,7 +3,7 @@
  *
  * G2 bus DMA support
  *
- * Copyright (C) 2003  Paul Mundt
+ * Copyright (C) 2003, 2004  Paul Mundt
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
@@ -59,104 +59,102 @@
 	.flags		= SA_INTERRUPT,
 };
 
-static int g2_enable_dma(struct dma_info *info)
+static int g2_enable_dma(struct dma_channel *chan)
 {
-	unsigned int chan = info->chan;
+	unsigned int chan_nr = chan->chan;
 
-	g2_dma->channel[chan].chan_enable = 1;
-	g2_dma->channel[chan].xfer_enable = 1;
+	g2_dma->channel[chan_nr].chan_enable = 1;
+	g2_dma->channel[chan_nr].xfer_enable = 1;
 
 	return 0;
 }
 
-static int g2_disable_dma(struct dma_info *info)
+static int g2_disable_dma(struct dma_channel *chan)
 {
-	unsigned int chan = info->chan;
+	unsigned int chan_nr = chan->chan;
 
-	g2_dma->channel[chan].chan_enable = 0;
-	g2_dma->channel[chan].xfer_enable = 0;
+	g2_dma->channel[chan_nr].chan_enable = 0;
+	g2_dma->channel[chan_nr].xfer_enable = 0;
 
 	return 0;
 }
 
-static int g2_xfer_dma(struct dma_info *info)
+static int g2_xfer_dma(struct dma_channel *chan)
 {
-	unsigned int chan = info->chan;
+	unsigned int chan_nr = chan->chan;
 
-	if (info->sar & 31) {
-		printk("g2dma: unaligned source 0x%lx\n", info->sar);
+	if (chan->sar & 31) {
+		printk("g2dma: unaligned source 0x%lx\n", chan->sar);
 		return -EINVAL;
 	}
 
-	if (info->dar & 31) {
-		printk("g2dma: unaligned dest 0x%lx\n", info->dar);
+	if (chan->dar & 31) {
+		printk("g2dma: unaligned dest 0x%lx\n", chan->dar);
 		return -EINVAL;
 	}
 
 	/* Align the count */
-	if (info->count & 31)
-		info->count = (info->count + (32 - 1)) & ~(32 - 1);
+	if (chan->count & 31)
+		chan->count = (chan->count + (32 - 1)) & ~(32 - 1);
 
 	/* Fixup destination */
-	info->dar += 0xa0800000;
+	chan->dar += 0xa0800000;
 
 	/* Fixup direction */
-	info->mode = !info->mode;
+	chan->mode = !chan->mode;
 
-	flush_icache_range((unsigned long)info->sar, info->count);
+	flush_icache_range((unsigned long)chan->sar, chan->count);
 
-	g2_disable_dma(info);
+	g2_disable_dma(chan);
 
-	g2_dma->channel[chan].g2_addr	= info->dar & 0x1fffffe0;
-	g2_dma->channel[chan].root_addr = info->sar & 0x1fffffe0;
-	g2_dma->channel[chan].size	= (info->count & ~31) | 0x80000000;
-	g2_dma->channel[chan].direction = info->mode;
+	g2_dma->channel[chan_nr].g2_addr   = chan->dar & 0x1fffffe0;
+	g2_dma->channel[chan_nr].root_addr = chan->sar & 0x1fffffe0;
+	g2_dma->channel[chan_nr].size	   = (chan->count & ~31) | 0x80000000;
+	g2_dma->channel[chan_nr].direction = chan->mode;
 
 	/*
 	 * bit 0 - ???
 	 * bit 1 - if set, generate a hardware event on transfer completion
 	 * bit 2 - ??? something to do with suspend?
 	 */
-	g2_dma->channel[chan].ctrl	= 5; /* ?? */
+	g2_dma->channel[chan_nr].ctrl	= 5; /* ?? */
+
+	g2_enable_dma(chan);
 
-	g2_enable_dma(info);
-	
 	/* debug cruft */
 	pr_debug("count, sar, dar, mode, ctrl, chan, xfer: %ld, 0x%08lx, "
 		 "0x%08lx, %ld, %ld, %ld, %ld\n",
-		 g2_dma->channel[chan].size,
-		 g2_dma->channel[chan].root_addr,
-		 g2_dma->channel[chan].g2_addr,
-		 g2_dma->channel[chan].direction,
-		 g2_dma->channel[chan].ctrl,
-		 g2_dma->channel[chan].chan_enable,
-		 g2_dma->channel[chan].xfer_enable);
+		 g2_dma->channel[chan_nr].size,
+		 g2_dma->channel[chan_nr].root_addr,
+		 g2_dma->channel[chan_nr].g2_addr,
+		 g2_dma->channel[chan_nr].direction,
+		 g2_dma->channel[chan_nr].ctrl,
+		 g2_dma->channel[chan_nr].chan_enable,
+		 g2_dma->channel[chan_nr].xfer_enable);
 
 	return 0;
 }
 
 static struct dma_ops g2_dma_ops = {
-	.name		= "G2 DMA",
 	.xfer		= g2_xfer_dma,
 };
 
+static struct dma_info g2_dma_info = {
+	.name		= "G2 DMA",
+	.nr_channels	= 4,
+	.ops		= &g2_dma_ops,
+	.flags		= DMAC_CHANNELS_TEI_CAPABLE,
+};
+
 static int __init g2_dma_init(void)
 {
-	int i, base;
-
 	setup_irq(HW_EVENT_G2_DMA, &g2_dma_irq);
 
 	/* Magic */
 	g2_dma->wait_state	= 27;
 	g2_dma->magic		= 0x4659404f;
 
-	/* G2 channels come after on-chip and pvr2 */
-	base = ONCHIP_NR_DMA_CHANNELS + PVR2_NR_DMA_CHANNELS;
-
-	for (i = 0; i < G2_NR_DMA_CHANNELS; i++)
-		dma_info[base + i].ops = &g2_dma_ops;
-	
-	return register_dmac(&g2_dma_ops);
+	return register_dmac(&g2_dma_info);
 }
 
 static void __exit g2_dma_exit(void)

Index: dma-pvr2.c
===================================================================
RCS file: /cvsroot/linuxsh/linux/arch/sh/drivers/dma/dma-pvr2.c,v
retrieving revision 1.2
retrieving revision 1.3
diff -u -d -r1.2 -r1.3
--- dma-pvr2.c	9 Oct 2003 14:12:03 -0000	1.2
+++ dma-pvr2.c	29 Jul 2004 03:11:00 -0000	1.3
@@ -3,7 +3,7 @@
  *
  * NEC PowerVR 2 (Dreamcast) DMA support
  *
- * Copyright (C) 2003  Paul Mundt
+ * Copyright (C) 2003, 2004  Paul Mundt
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
@@ -38,7 +38,7 @@
 	return IRQ_HANDLED;
 }
 
-static int pvr2_request_dma(struct dma_info *info)
+static int pvr2_request_dma(struct dma_channel *chan)
 {
 	if (ctrl_inl(PVR2_DMA_MODE) != 0)
 		return -EBUSY;
@@ -48,21 +48,21 @@
 	return 0;
 }
 
-static int pvr2_get_dma_residue(struct dma_info *info)
+static int pvr2_get_dma_residue(struct dma_channel *chan)
 {
 	return xfer_complete == 0;
 }
 
-static int pvr2_xfer_dma(struct dma_info *info)
+static int pvr2_xfer_dma(struct dma_channel *chan)
 {
-	if (info->sar || !info->dar)
+	if (chan->sar || !chan->dar)
 		return -EINVAL;
 
 	xfer_complete = 0;
 
-	ctrl_outl(info->dar, PVR2_DMA_ADDR);
-	ctrl_outl(info->count, PVR2_DMA_COUNT);
-	ctrl_outl(info->mode & DMA_MODE_MASK, PVR2_DMA_MODE);
+	ctrl_outl(chan->dar, PVR2_DMA_ADDR);
+	ctrl_outl(chan->count, PVR2_DMA_COUNT);
+	ctrl_outl(chan->mode & DMA_MODE_MASK, PVR2_DMA_MODE);
 
 	return 0;
 }
@@ -74,26 +74,24 @@
 };
 
 static struct dma_ops pvr2_dma_ops = {
-	.name		= "PowerVR 2 DMA",
 	.request	= pvr2_request_dma,
 	.get_residue	= pvr2_get_dma_residue,
 	.xfer		= pvr2_xfer_dma,
 };
 
+static struct dma_info pvr2_dma_info = {
+	.name		= "PowerVR 2 DMA",
+	.nr_channels	= 1,
+	.ops		= &pvr2_dma_ops,
+	.flags		= DMAC_CHANNELS_TEI_CAPABLE,
+};
+
 static int __init pvr2_dma_init(void)
 {
-	int i, base;
-
 	setup_irq(HW_EVENT_PVR2_DMA, &pvr2_dma_irq);
 	request_dma(PVR2_CASCADE_CHAN, "pvr2 cascade");
 
-	/* PVR2 cascade comes after on-chip DMAC */
-	base = ONCHIP_NR_DMA_CHANNELS;
-
-	for (i = 0; i < PVR2_NR_DMA_CHANNELS; i++)
-		dma_info[base + i].ops = &pvr2_dma_ops;
-
-	return register_dmac(&pvr2_dma_ops);
+	return register_dmac(&pvr2_dma_info);
 }
 
 static void __exit pvr2_dma_exit(void)

Update of /cvsroot/linuxsh/linux
In directory sc8-pr-cvs1.sourceforge.net:/tmp/cvs-serv19303

Modified Files:
	ChangeLog 
Log Message:
Update G2 and PVR2 DMA drivers to comply with recent API changes.



Index: ChangeLog
===================================================================
RCS file: /cvsroot/linuxsh/linux/ChangeLog,v
retrieving revision 1.328
retrieving revision 1.329
diff -u -d -r1.328 -r1.329
--- ChangeLog	27 Jul 2004 02:37:19 -0000	1.328
+++ ChangeLog	29 Jul 2004 03:10:42 -0000	1.329
@@ -1,3 +1,8 @@
+2004-07-28  Paul Mundt  <lethal@...>
+
+	* arch/sh/drivers/dma/dma-pvr2.c: Update for DMA API changes.
+	* arch/sh/drivers/dma/dma-g2.c: Likewise.
+
 2004-07-26  Paul Mundt  <lethal@...>
 
 	More fixups by Hosokawa-san <hosokawa@...>

Update of /cvsroot/linuxsh/linux/drivers/serial
In directory sc8-pr-cvs1.sourceforge.net:/tmp/cvs-serv18651/drivers/serial

Modified Files:
	sh-sci.c 
Log Message:
Fix cpufreq compile warning in sh-sci handler.



Index: sh-sci.c
===================================================================
RCS file: /cvsroot/linuxsh/linux/drivers/serial/sh-sci.c,v
retrieving revision 1.21
retrieving revision 1.22
diff -u -d -r1.21 -r1.22
--- sh-sci.c	28 Jun 2004 13:18:43 -0000	1.21
+++ sh-sci.c	29 Jul 2004 03:06:07 -0000	1.22
@@ -798,7 +798,7 @@
 	if ((phase == CPUFREQ_POSTCHANGE) ||
 	    (phase == CPUFREQ_RESUMECHANGE)){
 		for (i = 0; i < SCI_NPORTS; i++) {
-			struct uart_port *port = &sci_ports[i];
+			struct uart_port *port = &sci_ports[i].port;
 
 			/*
 			 * Update the uartclk per-port if frequency has

Update of /cvsroot/linuxsh/linux/include/asm-sh
In directory sc8-pr-cvs1.sourceforge.net:/tmp/cvs-serv18862/include/asm-sh

Modified Files:
	dma-mapping.h 
Log Message:
Fix compile warning due to missing pci_bus_type declaration.



Index: dma-mapping.h
===================================================================
RCS file: /cvsroot/linuxsh/linux/include/asm-sh/dma-mapping.h,v
retrieving revision 1.7
retrieving revision 1.8
diff -u -d -r1.7 -r1.8
--- dma-mapping.h	26 Jun 2004 15:28:45 -0000	1.7
+++ dma-mapping.h	29 Jul 2004 03:07:34 -0000	1.8
@@ -7,6 +7,8 @@
 #include <asm/scatterlist.h>
 #include <asm/io.h>
 
+extern struct bus_type pci_bus_type;
+
 /* arch/sh/mm/consistent.c */
 extern void *consistent_alloc(int gfp, size_t size, dma_addr_t *handle);
 extern void consistent_free(void *vaddr, size_t size);

Update of /cvsroot/linuxsh/linux/arch/sh/drivers/pci
In directory sc8-pr-cvs1.sourceforge.net:/tmp/cvs-serv12273/arch/sh/drivers/pci

Modified Files:
	fixups-rts7751r2d.c ops-rts7751r2d.c pci-auto.c pci-sh7751.c 
	pci.c 
Log Message:
Merge RTS7751R2D/HS7751RVoIP updates from Hosokawa-san <hosokawa@...>



Index: fixups-rts7751r2d.c
===================================================================
RCS file: /cvsroot/linuxsh/linux/arch/sh/drivers/pci/fixups-rts7751r2d.c,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -d -r1.1 -r1.2
--- fixups-rts7751r2d.c	21 Apr 2004 00:09:13 -0000	1.1
+++ fixups-rts7751r2d.c	27 Jul 2004 02:37:19 -0000	1.2
@@ -18,15 +18,26 @@
 
 int pci_fixup_pcic(void)
 {
-	unsigned long mcr;
+	unsigned long bcr1, mcr;
 
-	outl(0xfb900047, SH7751_PCICONF1);
-	outl(0xab000001, SH7751_PCICONF4);
+	bcr1 = inl(SH7751_BCR1);
+	bcr1 |= 0x40080000;	/* Enable Bit 19 BREQEN, set PCIC to slave */
+	outl(bcr1, PCI_REG(SH7751_PCIBCR1));
+
+	/* Enable all interrupts, so we known what to fix */
+	outl(0x0000c3ff, PCI_REG(SH7751_PCIINTM));
+	outl(0x0000380f, PCI_REG(SH7751_PCIAINTM));
+
+	outl(0xfb900047, PCI_REG(SH7751_PCICONF1));
+	outl(0xab000001, PCI_REG(SH7751_PCICONF4));
 
 	mcr = inl(SH7751_MCR);
 	mcr = (mcr & PCIMCR_MRSET_OFF) & PCIMCR_RFSH_OFF;
-	outl(mcr, SH7751_PCIMCR);
+	outl(mcr, PCI_REG(SH7751_PCIMCR));
 
+	outl(0x0c000000, PCI_REG(SH7751_PCICONF5));
+	outl(0xd0000000, PCI_REG(SH7751_PCICONF6));
+	outl(0x0c000000, PCI_REG(SH7751_PCILAR0));
+	outl(0x00000000, PCI_REG(SH7751_PCILAR1));
 	return 0;
 }
-

Index: ops-rts7751r2d.c
===================================================================
RCS file: /cvsroot/linuxsh/linux/arch/sh/drivers/pci/ops-rts7751r2d.c,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -d -r1.1 -r1.2
--- ops-rts7751r2d.c	21 Apr 2004 00:09:13 -0000	1.1
+++ ops-rts7751r2d.c	27 Jul 2004 02:37:19 -0000	1.2
@@ -61,7 +61,12 @@
 static struct sh7751_pci_address_map sh7751_pci_map = {
 	.window0	= {
 		.base	= SH7751_CS3_BASE_ADDR,
-		.size	= 0x03f00000,
+		.size	= 0x04000000,
+	},
+
+	.window1	= {
+		.base	= 0x00000000,	/* Unused */
+		.size	= 0x00000000,	/* Unused */
 	},
 
 	.flags	= SH7751_PCIC_NO_RESET,

Index: pci-auto.c
===================================================================
RCS file: /cvsroot/linuxsh/linux/arch/sh/drivers/pci/pci-auto.c,v
retrieving revision 1.2
retrieving revision 1.3
diff -u -d -r1.2 -r1.3
--- pci-auto.c	21 Apr 2004 00:09:13 -0000	1.2
+++ pci-auto.c	27 Jul 2004 02:37:19 -0000	1.3
@@ -524,8 +524,10 @@
 					 PCI_COMMAND, cmdstat | PCI_COMMAND_IO |
 					 PCI_COMMAND_MEMORY |
 					 PCI_COMMAND_MASTER);
+#if !defined(CONFIG_SH_HS7751RVOIP) && !defined(CONFIG_SH_RTS7751R2D)
 		early_write_config_byte(hose, top_bus, current_bus, pci_devfn,
 					PCI_LATENCY_TIMER, 0x80);
+#endif
 
 		/* Allocate PCI I/O and/or memory space */
 		pciauto_setup_bars(hose, top_bus, current_bus, pci_devfn, PCI_BASE_ADDRESS_5);

Index: pci-sh7751.c
===================================================================
RCS file: /cvsroot/linuxsh/linux/arch/sh/drivers/pci/pci-sh7751.c,v
retrieving revision 1.6
retrieving revision 1.7
diff -u -d -r1.6 -r1.7
--- pci-sh7751.c	21 Apr 2004 00:09:14 -0000	1.6
+++ pci-sh7751.c	27 Jul 2004 02:37:19 -0000	1.7
@@ -158,7 +158,6 @@
  *  Handle bus scanning and fixups ....
  */
 
-#if !defined(CONFIG_SH_HS7751RVOIP) && !defined(CONFIG_SH_RTS7751R2D)
 static void __init pci_fixup_ide_bases(struct pci_dev *d)
 {
 	int i;
@@ -177,13 +176,10 @@
 		}
 	}
 }
-#endif
 
 /* Add future fixups here... */
 struct pci_fixup pcibios_fixups[] = {
-#if !defined(CONFIG_SH_HS7751RVOIP) && !defined(CONFIG_SH_RTS7751R2D)
 	{ PCI_FIXUP_HEADER,	PCI_ANY_ID,	PCI_ANY_ID,	pci_fixup_ide_bases },
-#endif
 	{ 0 }
 };
 
@@ -263,7 +259,7 @@
 	outl(0, PCI_REG(SH7751_PCICLKR));
 	/* Clear Powerdown IRQ's (not done in reset) */
 	word = SH7751_PCIPINT_D3 | SH7751_PCIPINT_D0;
-	outl(word, PCI_REG(SH7751_PCICLKR));
+	outl(word, PCI_REG(SH7751_PCIPINT));
 
 	/*
 	 * This code is unused for some boards as it is done in the
@@ -368,7 +364,7 @@
 	 * TODO: add support for the internal error interrupts and
 	 * DMA interrupts...
 	 */
-	 
+
 #ifdef CONFIG_SH_RTS7751R2D
 	pci_fixup_pcic();
 #endif

Index: pci.c
===================================================================
RCS file: /cvsroot/linuxsh/linux/arch/sh/drivers/pci/pci.c,v
retrieving revision 1.2
retrieving revision 1.3
diff -u -d -r1.2 -r1.3
--- pci.c	21 Apr 2004 00:09:14 -0000	1.2
+++ pci.c	27 Jul 2004 02:37:19 -0000	1.3
@@ -106,6 +106,8 @@
 	pci_read_config_word(dev, PCI_COMMAND, &cmd);
 	old_cmd = cmd;
 	for(idx=0; idx<6; idx++) {
+		if (!(mask & (1 << idx)))
+			continue;
 		r = &dev->resource[idx];
 		if (!r->start && r->end) {
 			printk(KERN_ERR "PCI: Device %s not available because "

Update of /cvsroot/linuxsh/linux
In directory sc8-pr-cvs1.sourceforge.net:/tmp/cvs-serv12273

Modified Files:
	ChangeLog 
Log Message:
Merge RTS7751R2D/HS7751RVoIP updates from Hosokawa-san <hosokawa@...>



Index: ChangeLog
===================================================================
RCS file: /cvsroot/linuxsh/linux/ChangeLog,v
retrieving revision 1.327
retrieving revision 1.328
diff -u -d -r1.327 -r1.328
--- ChangeLog	8 Jul 2004 13:52:21 -0000	1.327
+++ ChangeLog	27 Jul 2004 02:37:19 -0000	1.328
@@ -1,3 +1,19 @@
+2004-07-26  Paul Mundt  <lethal@...>
+
+	More fixups by Hosokawa-san <hosokawa@...>
+
+	* arch/sh/drivers/pci/fixups-rts7751r2d.c (pci_fixup_pcic): Use
+	PCI_REG() for proper register offsets. Additional PCIC init.
+
+	* arch/sh/drivers/pci/ops-rts7751r2d.c (sh7751_pci_map): Fix window0
+	size, add dummy window1.
+
+	* arch/sh/drivers/pci/pci-sh7751.c (pci_fixup_ide_bases): Enable this
+	for RTS7751R2D/HS7751RVoIP.
+	(pcibios_fixups): Likewise.
+
+	* arch/sh/drivers/pci/pci.c (pcibios_enable_device): Add mask check.
+
 2004-07-07  Paul Mundt  <lethal@...>
 
 	* arch/sh/mm/cache-sh[234].c (detect_cpu_and_cache_system): Moved ..

Update of /cvsroot/linuxsh/linux/arch/sh/mm
In directory sc8-pr-cvs1.sourceforge.net:/tmp/cvs-serv24140/arch/sh/mm

Modified Files:
	cache-sh2.c cache-sh3.c cache-sh4.c 
Log Message:
Move detect_cpu_and_cache_system() to arch/sh/kernel/cpu/sh?/probe.c



Index: cache-sh2.c
===================================================================
RCS file: /cvsroot/linuxsh/linux/arch/sh/mm/cache-sh2.c,v
retrieving revision 1.4
retrieving revision 1.5
diff -u -d -r1.4 -r1.5
--- cache-sh2.c	9 Aug 2003 20:16:24 -0000	1.4
+++ cache-sh2.c	8 Jul 2004 13:52:22 -0000	1.5
@@ -24,7 +24,7 @@
 unsigned long __get_oc_addr(unsigned long set, unsigned long way)
 {
 	unsigned long ccr;
-	
+
 	/*
 	 * On SH-2 the way bit isn't tracked in the address field
 	 * if we're doing address array access .. instead, we need
@@ -48,25 +48,3 @@
 	return CACHE_OC_ADDRESS_ARRAY | (set << cpu_data->dcache.entry_shift);
 }
 
-int __init detect_cpu_and_cache_system(void)
-{
-	/*
-	 * For now, assume SH7604 .. fix this later.
-	 */
-	cpu_data->type			= CPU_SH7604;
-	cpu_data->dcache.ways		= 4;
-	cpu_data->dcache.way_shift	= 6;
-	cpu_data->dcache.sets		= 64;
-	cpu_data->dcache.entry_shift	= 4;
-	cpu_data->dcache.linesz		= L1_CACHE_BYTES;
-	cpu_data->dcache.flags		= 0;
-
-	/*
-	 * SH-2 doesn't have separate caches
-	 */
-	cpu_data->dcache.flags |= SH_CACHE_COMBINED;
-	cpu_data->icache = cpu_data->dcache;
-
-	return 0;
-}
-

Index: cache-sh3.c
===================================================================
RCS file: /cvsroot/linuxsh/linux/arch/sh/mm/cache-sh3.c,v
retrieving revision 1.10
retrieving revision 1.11
diff -u -d -r1.10 -r1.11
--- cache-sh3.c	5 Jun 2004 17:17:34 -0000	1.10
+++ cache-sh3.c	8 Jul 2004 13:52:22 -0000	1.11
@@ -1,9 +1,10 @@
-/* $Id$
- *
- *  linux/arch/sh/mm/cache-sh3.c
+/*
+ * arch/sh/mm/cache-sh3.c
  *
  * Copyright (C) 1999, 2000  Niibe Yutaka
  * Copyright (C) 2002 Paul Mundt
+ *
+ * Released under the terms of the GNU GPL v2.0.
  */
 
 #include <linux/init.h>
@@ -21,72 +22,6 @@
 #include <asm/mmu_context.h>
 #include <asm/cacheflush.h>
 
-int __init detect_cpu_and_cache_system(void)
-{
-	unsigned long addr0, addr1, data0, data1, data2, data3;
-
-	jump_to_P2();
-	/*
-	 * Check if the entry shadows or not.
-	 * When shadowed, it's 128-entry system.
-	 * Otherwise, it's 256-entry system.
-	 */
-	addr0 = CACHE_OC_ADDRESS_ARRAY + (3 << 12);
-	addr1 = CACHE_OC_ADDRESS_ARRAY + (1 << 12);
-
-	/* First, write back & invalidate */
-	data0  = ctrl_inl(addr0);
-	ctrl_outl(data0&~(SH_CACHE_VALID|SH_CACHE_UPDATED), addr0);
-	data1  = ctrl_inl(addr1);
-	ctrl_outl(data1&~(SH_CACHE_VALID|SH_CACHE_UPDATED), addr1);
-
-	/* Next, check if there's shadow or not */
-	data0 = ctrl_inl(addr0);
-	data0 ^= SH_CACHE_VALID;
-	ctrl_outl(data0, addr0);
-	data1 = ctrl_inl(addr1);
-	data2 = data1 ^ SH_CACHE_VALID;
-	ctrl_outl(data2, addr1);
-	data3 = ctrl_inl(addr0);
-
-	/* Lastly, invaliate them. */
-	ctrl_outl(data0&~SH_CACHE_VALID, addr0);
-	ctrl_outl(data2&~SH_CACHE_VALID, addr1);
-
-	back_to_P1();
-
-	cpu_data->dcache.ways		= 4;
-	cpu_data->dcache.entry_shift	= 4;
-	cpu_data->dcache.linesz		= L1_CACHE_BYTES;
-	cpu_data->dcache.flags		= 0;
-
-	/*
-	 * 7709A/7729 has 16K cache (256-entry), while 7702 has only
-	 * 2K(direct) 7702 is not supported (yet)
-	 */
-	if (data0 == data1 && data2 == data3) {	/* Shadow */
-		cpu_data->dcache.way_incr	= (1 << 11);
-		cpu_data->dcache.entry_mask	= 0x7f0;
-		cpu_data->dcache.sets		= 128;
-		cpu_data->type = CPU_SH7708;
-
-		cpu_data->flags |= CPU_HAS_MMU_PAGE_ASSOC;
-	} else {				/* 7709A or 7729  */
-		cpu_data->dcache.way_incr	= (1 << 12);
-		cpu_data->dcache.entry_mask	= 0xff0;
-		cpu_data->dcache.sets		= 256;
-		cpu_data->type = CPU_SH7729;
-	}
-
-	/*
-	 * SH-3 doesn't have separate caches
-	 */
-	cpu_data->dcache.flags |= SH_CACHE_COMBINED;
-	cpu_data->icache = cpu_data->dcache;
-
-	return 0;
-}
-
 /*
  * Write back the dirty D-caches, but not invalidate them.
  *
@@ -116,7 +51,7 @@
 			addr = addrstart | (v & cpu_data->dcache.entry_mask);
 			local_irq_save(flags);
 			data = ctrl_inl(addr);
-			
+
 			if ((data & CACHE_PHYSADDR_MASK) ==
 			    (p & CACHE_PHYSADDR_MASK)) {
 				data &= ~SH_CACHE_UPDATED;

Index: cache-sh4.c
===================================================================
RCS file: /cvsroot/linuxsh/linux/arch/sh/mm/cache-sh4.c,v
retrieving revision 1.32
retrieving revision 1.33
diff -u -d -r1.32 -r1.33
--- cache-sh4.c	28 Jun 2004 13:18:43 -0000	1.32
+++ cache-sh4.c	8 Jul 2004 13:52:22 -0000	1.33
@@ -1,10 +1,13 @@
-/* $Id$
- *
- *  linux/arch/sh/mm/cache-sh4.c
+/*
+ * arch/sh/mm/cache-sh4.c
  *
  * Copyright (C) 1999, 2000, 2002  Niibe Yutaka
  * Copyright (C) 2001, 2002, 2003, 2004  Paul Mundt
  * Copyright (C) 2003  Richard Curnow
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
  */
 
 #include <linux/config.h>
@@ -28,132 +31,6 @@
 extern void __flush_dcache_all(void);
 static void __flush_dcache_all_ex(void);
 
-int __init detect_cpu_and_cache_system(void)
-{
-	unsigned long pvr, prr, cvr;
-	unsigned long size;
-
-	static unsigned long sizes[16] = {
-		[1] = (1 << 12),
-		[2] = (1 << 13),
-		[4] = (1 << 14),
-		[8] = (1 << 15),
-		[9] = (1 << 16)
-	};
-
-	pvr = (ctrl_inl(CCN_PVR) >> 8) & 0xffff;
-	prr = (ctrl_inl(CCN_PRR) >> 4) & 0xff;
-	cvr = (ctrl_inl(CCN_CVR));
-
-	/*
-	 * Setup some sane SH-4 defaults for the icache
-	 */
-	cpu_data->icache.way_incr	= (1 << 13);
-	cpu_data->icache.entry_shift	= 5;
-	cpu_data->icache.entry_mask	= 0x1fe0;
-	cpu_data->icache.sets		= 256;
-	cpu_data->icache.ways		= 1;
-	cpu_data->icache.linesz		= L1_CACHE_BYTES;
-
-	/*
-	 * And again for the dcache ..
-	 */
-	cpu_data->dcache.way_incr	= (1 << 14);
-	cpu_data->dcache.entry_shift	= 5;
-	cpu_data->dcache.entry_mask	= 0x3fe0;
-	cpu_data->dcache.sets		= 512;
-	cpu_data->dcache.ways		= 1;
-	cpu_data->dcache.linesz		= L1_CACHE_BYTES;
-
-	/* Set the FPU flag, virtually all SH-4's have one */
-	cpu_data->flags |= CPU_HAS_FPU;
-
-	/*
-	 * Probe the underlying processor version/revision and
-	 * adjust cpu_data setup accordingly.
-	 */
-	switch (pvr) {
-	case 0x205:
-		cpu_data->type = CPU_SH7750;
-		cpu_data->flags |= CPU_HAS_P2_FLUSH_BUG;
-		break;
-	case 0x206:
-		cpu_data->type = CPU_SH7750S;
-
-		/* 
-		 * FIXME: This is needed for 7750, but do we need it for the
-		 * 7750S too? For now, assume we do.. -- PFM
-		 */
-		cpu_data->flags |= CPU_HAS_P2_FLUSH_BUG;
-
-		break;
-	case 0x1100:
-		cpu_data->type = CPU_SH7751;
-		break;
-	case 0x2000:
-		cpu_data->type = CPU_SH73180;
-		cpu_data->icache.ways = 4;
-		cpu_data->dcache.ways = 4;
-		cpu_data->flags &= ~CPU_HAS_FPU;
-		break;
-	case 0x8000:
-		cpu_data->type = CPU_ST40RA;
-		break;
-	case 0x8100:
-		cpu_data->type = CPU_ST40GX1;
-		break;
-	case 0x700:
-		cpu_data->type = CPU_SH4_501;
-		cpu_data->icache.ways = 2;
-		cpu_data->dcache.ways = 2;
-
-		/* No FPU on the SH4-500 series.. */
-		cpu_data->flags &= ~CPU_HAS_FPU;
-		break;
-	case 0x600:
-		cpu_data->type = CPU_SH4_202;
-		cpu_data->icache.ways = 2;
-		cpu_data->dcache.ways = 2;
-		break;
-	case 0x500 ... 0x501:
-		switch (prr) {
-		    case 0x10: cpu_data->type = CPU_SH7750R; break;
-		    case 0x11: cpu_data->type = CPU_SH7751R; break;
-		    case 0x50: cpu_data->type = CPU_SH7760;  break;
-		}
-
-		cpu_data->icache.ways = 2;
-		cpu_data->dcache.ways = 2;
-
-		break;
-	default:
-		cpu_data->type = CPU_SH_NONE;
-		break;
-	}
-
-	/*
-	 * On anything that's not a direct-mapped cache, look to the CVR
-	 * for I/D-cache specifics.
-	 */
-	if (cpu_data->icache.ways > 1) {
-		size = sizes[(cvr >> 20) & 0xf];
-		cpu_data->icache.way_incr	= (size >> 1);
-		cpu_data->icache.sets		= (size >> 6);
-		cpu_data->icache.entry_mask	=
-			(cpu_data->icache.way_incr - (1 << 5));
-	}
-
-	if (cpu_data->dcache.ways > 1) {
-		size = sizes[(cvr >> 16) & 0xf];
-		cpu_data->dcache.way_incr	= (size >> 1);
-		cpu_data->dcache.sets		= (size >> 6);
-		cpu_data->dcache.entry_mask	=
-			(cpu_data->dcache.way_incr - (1 << 5));
-	}
-
-	return 0;
-}
-
 /*
  * SH-4 has virtually indexed and physically tagged cache.
  */

Update of /cvsroot/linuxsh/linux/arch/sh/kernel/cpu/sh2
In directory sc8-pr-cvs1.sourceforge.net:/tmp/cvs-serv24140/arch/sh/kernel/cpu/sh2

Modified Files:
	Makefile 
Added Files:
	probe.c 
Log Message:
Move detect_cpu_and_cache_system() to arch/sh/kernel/cpu/sh?/probe.c



--- NEW FILE: probe.c ---
/*
 * arch/sh/kernel/cpu/sh2/probe.c
 *
 * CPU Subtype Probing for SH-2.
 *
 * Copyright (C) 2002 Paul Mundt
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 */


#include <linux/init.h>
#include <asm/processor.h>
#include <asm/cache.h>

int __init detect_cpu_and_cache_system(void)
{
	/*
	 * For now, assume SH7604 .. fix this later.
	 */
	cpu_data->type			= CPU_SH7604;
	cpu_data->dcache.ways		= 4;
	cpu_data->dcache.way_shift	= 6;
	cpu_data->dcache.sets		= 64;
	cpu_data->dcache.entry_shift	= 4;
	cpu_data->dcache.linesz		= L1_CACHE_BYTES;
	cpu_data->dcache.flags		= 0;

	/*
	 * SH-2 doesn't have separate caches
	 */
	cpu_data->dcache.flags |= SH_CACHE_COMBINED;
	cpu_data->icache = cpu_data->dcache;

	return 0;
}


Index: Makefile
===================================================================
RCS file: /cvsroot/linuxsh/linux/arch/sh/kernel/cpu/sh2/Makefile,v
retrieving revision 1.2
retrieving revision 1.3
diff -u -d -r1.2 -r1.3
--- Makefile	4 May 2003 19:29:53 -0000	1.2
+++ Makefile	8 Jul 2004 13:52:22 -0000	1.3
@@ -2,3 +2,5 @@
 # Makefile for the Linux/SuperH SH-2 backends.
 #
 
+obj-y	:= probe.o
+

Update of /cvsroot/linuxsh/linux/arch/sh/kernel/cpu/sh3
In directory sc8-pr-cvs1.sourceforge.net:/tmp/cvs-serv24140/arch/sh/kernel/cpu/sh3

Modified Files:
	Makefile 
Added Files:
	probe.c 
Log Message:
Move detect_cpu_and_cache_system() to arch/sh/kernel/cpu/sh?/probe.c



--- NEW FILE: probe.c ---
/*
 * arch/sh/kernel/cpu/sh3/probe.c
 *
 * CPU Subtype Probing for SH-3.
 *
 * Copyright (C) 1999, 2000  Niibe Yutaka
 * Copyright (C) 2002  Paul Mundt
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 */

#include <linux/init.h>
#include <asm/processor.h>
#include <asm/cache.h>
#include <asm/io.h>

int __init detect_cpu_and_cache_system(void)
{
	unsigned long addr0, addr1, data0, data1, data2, data3;

	jump_to_P2();
	/*
	 * Check if the entry shadows or not.
	 * When shadowed, it's 128-entry system.
	 * Otherwise, it's 256-entry system.
	 */
	addr0 = CACHE_OC_ADDRESS_ARRAY + (3 << 12);
	addr1 = CACHE_OC_ADDRESS_ARRAY + (1 << 12);

	/* First, write back & invalidate */
	data0  = ctrl_inl(addr0);
	ctrl_outl(data0&~(SH_CACHE_VALID|SH_CACHE_UPDATED), addr0);
	data1  = ctrl_inl(addr1);
	ctrl_outl(data1&~(SH_CACHE_VALID|SH_CACHE_UPDATED), addr1);

	/* Next, check if there's shadow or not */
	data0 = ctrl_inl(addr0);
	data0 ^= SH_CACHE_VALID;
	ctrl_outl(data0, addr0);
	data1 = ctrl_inl(addr1);
	data2 = data1 ^ SH_CACHE_VALID;
	ctrl_outl(data2, addr1);
	data3 = ctrl_inl(addr0);

	/* Lastly, invaliate them. */
	ctrl_outl(data0&~SH_CACHE_VALID, addr0);
	ctrl_outl(data2&~SH_CACHE_VALID, addr1);

	back_to_P1();

	cpu_data->dcache.ways		= 4;
	cpu_data->dcache.entry_shift	= 4;
	cpu_data->dcache.linesz		= L1_CACHE_BYTES;
	cpu_data->dcache.flags		= 0;

	/*
	 * 7709A/7729 has 16K cache (256-entry), while 7702 has only
	 * 2K(direct) 7702 is not supported (yet)
	 */
	if (data0 == data1 && data2 == data3) {	/* Shadow */
		cpu_data->dcache.way_incr	= (1 << 11);
		cpu_data->dcache.entry_mask	= 0x7f0;
		cpu_data->dcache.sets		= 128;
		cpu_data->type = CPU_SH7708;

		cpu_data->flags |= CPU_HAS_MMU_PAGE_ASSOC;
	} else {				/* 7709A or 7729  */
		cpu_data->dcache.way_incr	= (1 << 12);
		cpu_data->dcache.entry_mask	= 0xff0;
		cpu_data->dcache.sets		= 256;
		cpu_data->type = CPU_SH7729;
	}

	/*
	 * SH-3 doesn't have separate caches
	 */
	cpu_data->dcache.flags |= SH_CACHE_COMBINED;
	cpu_data->icache = cpu_data->dcache;

	return 0;
}


Index: Makefile
===================================================================
RCS file: /cvsroot/linuxsh/linux/arch/sh/kernel/cpu/sh3/Makefile,v
retrieving revision 1.3
retrieving revision 1.4
diff -u -d -r1.3 -r1.4
--- Makefile	18 Nov 2003 13:55:03 -0000	1.3
+++ Makefile	8 Jul 2004 13:52:22 -0000	1.4
@@ -2,5 +2,5 @@
 # Makefile for the Linux/SuperH SH-3 backends.
 #
 
-obj-y	:= ex.o
+obj-y	:= ex.o probe.o

Update of /cvsroot/linuxsh/linux
In directory sc8-pr-cvs1.sourceforge.net:/tmp/cvs-serv24140

Modified Files:
	ChangeLog 
Log Message:
Move detect_cpu_and_cache_system() to arch/sh/kernel/cpu/sh?/probe.c



Index: ChangeLog
===================================================================
RCS file: /cvsroot/linuxsh/linux/ChangeLog,v
retrieving revision 1.326
retrieving revision 1.327
diff -u -d -r1.326 -r1.327
--- ChangeLog	5 Jul 2004 16:05:41 -0000	1.326
+++ ChangeLog	8 Jul 2004 13:52:21 -0000	1.327
@@ -1,3 +1,9 @@
+2004-07-07  Paul Mundt  <lethal@...>
+
+	* arch/sh/mm/cache-sh[234].c (detect_cpu_and_cache_system): Moved ..
+	* arch/sh/kernel/cpu/sh[234]/probe.c: here.
+	* arch/sh/kernel/cpu/sh[234]/Makefile: Add probe.o rule.
+
 2004-07-05  Paul Mundt  <lethal@...>
 
 	* arch/sh/kernel/time.c (time_init): RTS7751R2D and HS7751RVoIP don't

Update of /cvsroot/linuxsh/linux/arch/sh/kernel/cpu/sh4
In directory sc8-pr-cvs1.sourceforge.net:/tmp/cvs-serv24140/arch/sh/kernel/cpu/sh4

Modified Files:
	Makefile 
Added Files:
	probe.c 
Log Message:
Move detect_cpu_and_cache_system() to arch/sh/kernel/cpu/sh?/probe.c



--- NEW FILE: probe.c ---
/*
 * arch/sh/kernel/cpu/sh4/probe.c
 *
 * CPU Subtype Probing for SH-4.
 *
 * Copyright (C) 2001, 2002, 2003, 2004  Paul Mundt
 * Copyright (C) 2003  Richard Curnow
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 */

#include <linux/init.h>
#include <asm/processor.h>
#include <asm/cache.h>
#include <asm/io.h>

int __init detect_cpu_and_cache_system(void)
{
	unsigned long pvr, prr, cvr;
	unsigned long size;

	static unsigned long sizes[16] = {
		[1] = (1 << 12),
		[2] = (1 << 13),
		[4] = (1 << 14),
		[8] = (1 << 15),
		[9] = (1 << 16)
	};

	pvr = (ctrl_inl(CCN_PVR) >> 8) & 0xffff;
	prr = (ctrl_inl(CCN_PRR) >> 4) & 0xff;
	cvr = (ctrl_inl(CCN_CVR));

	/*
	 * Setup some sane SH-4 defaults for the icache
	 */
	cpu_data->icache.way_incr	= (1 << 13);
	cpu_data->icache.entry_shift	= 5;
	cpu_data->icache.entry_mask	= 0x1fe0;
	cpu_data->icache.sets		= 256;
	cpu_data->icache.ways		= 1;
	cpu_data->icache.linesz		= L1_CACHE_BYTES;

	/*
	 * And again for the dcache ..
	 */
	cpu_data->dcache.way_incr	= (1 << 14);
	cpu_data->dcache.entry_shift	= 5;
	cpu_data->dcache.entry_mask	= 0x3fe0;
	cpu_data->dcache.sets		= 512;
	cpu_data->dcache.ways		= 1;
	cpu_data->dcache.linesz		= L1_CACHE_BYTES;

	/* Set the FPU flag, virtually all SH-4's have one */
	cpu_data->flags |= CPU_HAS_FPU;

	/*
	 * Probe the underlying processor version/revision and
	 * adjust cpu_data setup accordingly.
	 */
	switch (pvr) {
	case 0x205:
		cpu_data->type = CPU_SH7750;
		cpu_data->flags |= CPU_HAS_P2_FLUSH_BUG;
		break;
	case 0x206:
		cpu_data->type = CPU_SH7750S;

		/*
		 * FIXME: This is needed for 7750, but do we need it for the
		 * 7750S too? For now, assume we do.. -- PFM
		 */
		cpu_data->flags |= CPU_HAS_P2_FLUSH_BUG;

		break;
	case 0x1100:
		cpu_data->type = CPU_SH7751;
		break;
	case 0x2000:
		cpu_data->type = CPU_SH73180;
		cpu_data->icache.ways = 4;
		cpu_data->dcache.ways = 4;
		cpu_data->flags &= ~CPU_HAS_FPU;
		break;
	case 0x8000:
		cpu_data->type = CPU_ST40RA;
		break;
	case 0x8100:
		cpu_data->type = CPU_ST40GX1;
		break;
	case 0x700:
		cpu_data->type = CPU_SH4_501;
		cpu_data->icache.ways = 2;
		cpu_data->dcache.ways = 2;

		/* No FPU on the SH4-500 series.. */
		cpu_data->flags &= ~CPU_HAS_FPU;
		break;
	case 0x600:
		cpu_data->type = CPU_SH4_202;
		cpu_data->icache.ways = 2;
		cpu_data->dcache.ways = 2;
		break;
	case 0x500 ... 0x501:
		switch (prr) {
		    case 0x10: cpu_data->type = CPU_SH7750R; break;
		    case 0x11: cpu_data->type = CPU_SH7751R; break;
		    case 0x50: cpu_data->type = CPU_SH7760;  break;
		}

		cpu_data->icache.ways = 2;
		cpu_data->dcache.ways = 2;

		break;
	default:
		cpu_data->type = CPU_SH_NONE;
		break;
	}

	/*
	 * On anything that's not a direct-mapped cache, look to the CVR
	 * for I/D-cache specifics.
	 */
	if (cpu_data->icache.ways > 1) {
		size = sizes[(cvr >> 20) & 0xf];
		cpu_data->icache.way_incr	= (size >> 1);
		cpu_data->icache.sets		= (size >> 6);
		cpu_data->icache.entry_mask	=
			(cpu_data->icache.way_incr - (1 << 5));
	}

	if (cpu_data->dcache.ways > 1) {
		size = sizes[(cvr >> 16) & 0xf];
		cpu_data->dcache.way_incr	= (size >> 1);
		cpu_data->dcache.sets		= (size >> 6);
		cpu_data->dcache.entry_mask	=
			(cpu_data->dcache.way_incr - (1 << 5));
	}

	return 0;
}


Index: Makefile
===================================================================
RCS file: /cvsroot/linuxsh/linux/arch/sh/kernel/cpu/sh4/Makefile,v
retrieving revision 1.7
retrieving revision 1.8
diff -u -d -r1.7 -r1.8
--- Makefile	28 Jun 2004 13:18:44 -0000	1.7
+++ Makefile	8 Jul 2004 13:52:22 -0000	1.8
@@ -2,7 +2,8 @@
 # Makefile for the Linux/SuperH SH-4 backends.
 #
 
-obj-y	:= ex.o
+obj-y	:= ex.o probe.o
+
 obj-$(CONFIG_SH_FPU)                    += fpu.o 
 obj-$(CONFIG_CPU_SUBTYPE_ST40STB1)	+= irq_intc2.o
 obj-$(CONFIG_SH_STORE_QUEUES)		+= sq.o

Update of /cvsroot/linuxsh/linux
In directory sc8-pr-cvs1.sourceforge.net:/tmp/cvs-serv13968

Modified Files:
	ChangeLog 
Log Message:
Get rid of special interval handling for rts7751r2d/hs7751rvoip.



Index: ChangeLog
===================================================================
RCS file: /cvsroot/linuxsh/linux/ChangeLog,v
retrieving revision 1.325
retrieving revision 1.326
diff -u -d -r1.325 -r1.326
--- ChangeLog	29 Jun 2004 01:59:02 -0000	1.325
+++ ChangeLog	5 Jul 2004 16:05:41 -0000	1.326
@@ -1,3 +1,8 @@
+2004-07-05  Paul Mundt  <lethal@...>
+
+	* arch/sh/kernel/time.c (time_init): RTS7751R2D and HS7751RVoIP don't
+	need special handling for the interval value..
+
 2004-06-28  Paul Mundt  <lethal@...>
 
 	* arch/sh/kernel/asm-offsets.c: New file.

Update of /cvsroot/linuxsh/linux/arch/sh/kernel
In directory sc8-pr-cvs1.sourceforge.net:/tmp/cvs-serv13968/arch/sh/kernel

Modified Files:
	time.c 
Log Message:
Get rid of special interval handling for rts7751r2d/hs7751rvoip.



Index: time.c
===================================================================
RCS file: /cvsroot/linuxsh/linux/arch/sh/kernel/time.c,v
retrieving revision 1.26
retrieving revision 1.27
diff -u -d -r1.26 -r1.27
--- time.c	28 Jun 2004 13:18:44 -0000	1.26
+++ time.c	5 Jul 2004 16:05:41 -0000	1.27
@@ -1,6 +1,5 @@
-/* $Id$
- *
- *  linux/arch/sh/kernel/time.c
+/*
+ *  arch/sh/kernel/time.c
  *
  *  Copyright (C) 1999  Tetsuya Okada & Niibe Yutaka
  *  Copyright (C) 2000  Philipp Rumpf <prumpf@...>
@@ -96,8 +95,8 @@
 void (*rtc_get_time)(struct timespec *) = sh_rtc_gettimeofday;
 int (*rtc_set_time)(const time_t) = sh_rtc_settimeofday;
 #else
-void (*rtc_get_time)(struct timespec *) = 0;
-int (*rtc_set_time)(const time_t) = 0;
+void (*rtc_get_time)(struct timespec *);
+int (*rtc_set_time)(const time_t);
 #endif
 
 #if defined(CONFIG_CPU_SUBTYPE_SH7300)
@@ -405,8 +404,8 @@
 	return freq * factor;
 }
 
-void (*board_time_init)(void) = 0;
-void (*board_timer_setup)(struct irqaction *irq) = 0;
+void (*board_time_init)(void);
+void (*board_timer_setup)(struct irqaction *irq);
 
 static unsigned int sh_pclk_freq __initdata = CONFIG_SH_PCLK_FREQ;
 
@@ -640,6 +639,7 @@
 #endif
 
 #ifdef CONFIG_CPU_SUBTYPE_ST40STB1
+	/* XXX: Update ST40 code to use board_time_init() */
 	pvr = ctrl_inl(CCN_PVR);
 	frqcr = ctrl_inw(FRQCR);
 	printk("time.c ST40 Probe: PVR %08lx, FRQCR %04hx\n", pvr, frqcr);
@@ -648,7 +648,7 @@
 		st40_specific_time_init(current_cpu_data.module_clock, frqcr);
 	else
 #endif
-	    get_current_frequency_divisors(&ifc, &bfc, &pfc);
+		get_current_frequency_divisors(&ifc, &bfc, &pfc);
 
 	if (rtc_get_time) {
 		rtc_get_time(&xtime);
@@ -691,11 +691,8 @@
 	printk("Module clock: %d.%02dMHz\n",
 	       (current_cpu_data.module_clock / 1000000),
 	       (current_cpu_data.module_clock % 1000000)/10000);
-#if defined(CONFIG_SH_HS7751RVOIP) || defined(CONFIG_SH_RTS7751R2D)
-	interval = ((current_cpu_data.module_clock/4 + HZ/2) / HZ) - 1;
-#else
+
 	interval = (current_cpu_data.module_clock/4 + HZ/2) / HZ;
-#endif
 
 	printk("Interval = %ld\n", interval);