The HDL Complexity Tool

The HDL Complexity Tool parses large complex hardware projects' source code to produce useful complexity results. GOALS: 1)Practical, effective and simple 2) Integrates with existing design flows 3) Used on real projects 4) Based on existing research 
 
 
This is a completely redesigned tool that produces stable complexity metrics from Verilog and Cyclicity CDL projects. Mixed code is not a problem and both files and modules are supported. We have focused on useful complexity metrics in several output formats and tried to improve performance as well. This release has been fielded and we are gathering feedback. Please join this alpha deployment stage and let us know what you need.