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- Programming Language: VHDL/Verilog ×
WiFi for machines based on the 65xx CPU family.
The project uses the infrared camera from the wiimote to track hand gestures. This tracking is performed on an Altera DE2-70 FPGA
X-RT: A portable multiprocessor real-time scheduling framework
An FPGA based system, using captured video as source of a basketball movement. Human movement is detected and translated into motion vectors to hit a virtual ball.
Yet Another DLX based Architecture System On a Chip (YADASOC) is a RTL Verilog implenetation of a DLX based CPU and subsystems.
cMIPS - an FPGA ready VHDL model for 5-stage pipeline, MIPS32r2 core
Meus arquivos de mestrado
Approach to design a digital FM receiver using a FPGA as main unit
Digital waveform viewer/editor. eWave is a visual waveform timing editor compatible with VCD format (with image export possibilities) intended to be used in educational or technological (digital design) purposes. It is distributed as an Eclipse plugin.
This is a fork of the Elphel cameras firmware CVS, fully open to contributions from the elphel users and developers community Everyone can submit patches or obtain CVS access for this fork Stable changes will be ported to the main CVS upon approv
A hardware H.264 video encoder written in VHDL suited to non-interlaced IP cameras and megapixel cameras. Designed to be synthesized into an FPGA or ASIC. Fast and small. Modular. Extensible.
Oscilloscope set top box for PC. There are many projects like that, but we want to try to design it in our way.
we want create a prccessor for neuralcomputers .
Inane's not a NES emulator. It is a reimplementation of the original NES hardware in VHDL with the goal of making it fully synthesize in hardware.
xswifs stands for: cross SoftWare Interfaces. This project provide examples (snippets) for interfacing various software tools and languages with various mechanism. It has been created to help in HW/SW co-simulation and to provide benchmarks.
Provides a simple way to interact with icarus verilog tool.
The ixo.de USB JTAG pod and firmware allows to access JTAG-capable chips via USB and a protocol like Altera USB-Blaster.
vhdl para curso embebidos jaquenod
SEL for access verilog via PLI/VPI API. Tested with Icarus Verilog.
The aim is to develop a foundation for a FPGA hardware platform able to run Linux kernel and software. It must be easy to add hardware accelerated ip-cores to the FPGA. Ethernet and TCP/IP is a corner stone of the hardware and software.
Linuxware is a hardware architechture that implements many linux system calls natively in hardware, to improve performance.
Implementation of Motorola microprocessor MC68000 in FPGA
mov86 is a free soft-core processor written in VHDL. The aim of the project is to develop a CPU-core with maximum compatibility to intel x86 architecture.
Open Source Hardware For Industrial Automation