Introduction

From preesm

Started in 2007, the PREESM project aims to offer a framework for fast prototyping and automatic code generation of parallel implementations. The inputs of the tool are an architecture, an algorithm and a scenario that basically gathers all informations linking algorithm and architecture. The target architectures are embedded architectures, with possibly several processors and many cores. The current version of PREESM focuses on static scheduling of algorithms. Once a part of an algorithm has been chosen to be executed on a given core or IP, it will always use this same core or IP. In order to be statically schedulable, an algorithm has to keep the same behavior while iterated.

The PREESM tool functionalities can be chosen and combined in workflows. A workflow is a graph representing the sequential execution of tasks such as mapping, code generation, implementation display... An overview of Preesm present and future capabilities is given in Preesm overview page.

Flash tutorials using provided projects are available in Flash tutorials page. An explanation of the algorithm model can be found in Algorithm model.

See the glossary.